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NVT2002TL Datasheet(PDF) 2 Page - NXP Semiconductors

Part # NVT2002TL
Description  Bidirectional voltage level translator for open-drain and push-pull applications
PDF  32 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

NVT2002TL Datasheet(HTML) 2 Page - NXP Semiconductors

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NXP Semiconductors
NVT2001; NVT2002
Bidirectional voltage level translator for open-drain and push-pull applications
3 Ordering information
Tamb = -40 °C to +105 °C.
Package
Type number
Topside
marking
Number
of bits
Name
Description
Version
NVT2002DP[1] N2002
2
TSSOP8
plastic thin shrink small outline package; 8 leads;
body width 3 mm
SOT505-1
NVT2002GD
N02
2
XSON8U
plastic extremely thin small outline package; no
leads; 8 terminals; UTLP based; body 3 × 2 × 0.5
mm
SOT996-2
NVT2002TL
tT2
2
HXSON8
thermal enhanced extremely thin small outline
package; no leads; 8 terminals, 0.5 mm pitch, 3 mm
x 2 mm x 0.5 mm body
SOT1052-2
NVT2001GM
T1
1
XSON6
plastic extremely thin small outline package; no
leads; 6 terminals; body 1 × 1.45 × 0.5 mm; requires
SSB
SOT886
Table 1. Ordering information
[1]
GTL2002DP = NVT2002DP.
3.1 Ordering options
Type number
Orderable part
number
Package
Packing method [1]
Minimum
order
quantity
Temperature
NVT2002DP
NVT2002DP,118
TSSOP8
Reel 13" Q1/T1 *Standard
mark SMD
2500
Tamb = -40 °C to +105 °C
NVT2002GD
NVT2002GD,125 [2] XSON8U
Reel 7" Q3/T4 *Standard
mark
3000
Tamb = -40 °C to +105 °C
NVT2002TL
NVT2002TLH
HXSON8
Reel 7" Q3/T4 NDP
4000
Tamb = -40 °C to +105 °C
NVT2001GM
NVT2001GMZ
XSON6
Reel 7" Q1/T1 *Standard
mark SMD SSB [3]
5000
Tamb = -40 °C to +105 °C
Table 2. Ordering options
[1]
Standard packing quantities and other packaging data are available at www.nxp.com/packages/.
[2]
Discontinuation Notice 202111012DN; drop in replacement is NVT2002TLH.
The TL package has a center pad vs no center pad for the GD package. The TL package pad is not electrically connected to the silicon and is not required
to connect to the PCB so it can drop onto the GD package PCB layout. If the existing GD package has a trace underneath the risk is low since the TL
package center pad is not connected to the silicon. If there are multiple traces there could be EMI and cross talk. In both cases the customer needs to
evaluate risk.
Note: The length and width are reversed between the "GD" and "TL" package drawings but the shorter edge contains the pins and is 2.0 mm in both
cases.
[3]
This packing method uses a Static Shielding Bag (SSB) solution. Material is to be kept in the sealed bag between uses.
NVT2001_NVT2002
All information provided in this document is subject to legal disclaimers.
© 2023 NXP B.V. All rights reserved.
Product data sheet
Rev. 4.4 — 22 May 2023
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