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LT5521

5521f

APPLICATIO S I FOR ATIO

The LT5521 is a high linearity double-balanced active

mixer. The chip consists of a double-balanced mixer core,

a high performance LO buffer and associated bias and

enable circuitry. The chip is designed to operate with a

supply voltage ranging from 3.15V to 5.25V.

Table 2. Port Impedance

FREQUENCY

DIFFERENTIAL

SINGLE-ENDED

(MHz)

INPUT

OUTPUT

19.8 + j0.7

282.2 – j8.4

49.9 + j0.1

100

20.1 + j2.0

282.3 – j20.8

49.8 + j0.3

300

18.2 + j5.3

262.3 – j55.1

49.2 + j0.9

600

15.2 + j16.8

231.4 – j67.0

47.7 + j2.0

1000

14.5 + j28.1

215.0 – j124.5

45.3 + j2.8

1500

20.5 + j42.3

109.5 – j158.0

43.3 + j2.8

2000

48.2 + j26.8

52.9 – j92.1

43.0 + j3.3

2300

18.2 + j29.4

61.6 – j74.2

43.4 + j4.6

3200

22.4 + j125.1

14.2 – j27.5

44.6 + j14.0

3500

27.9 – j4.4

42.4 + j17.9

4000

42.8 – j16.0

38.6 + j22.8

Signal Input Interface

Figure 2 shows the signal inputs of the LT5521. The signal

input pins are connected to the common emitter nodes of

the mixer quad differential pairs. The real part of the

differential IN+/IN– impedance is 20

Ω. The mixer core

current is set by external resistors R1 and R7. Setting their

values at 110

Ω, the nominal DC voltage at the inputs is

2.2V with VCC = 5V. Figure 3 shows the input return loss

for a matched input at 250MHz.

For input frequencies above 100MHz, a broadband im-

pedance matching tranformer with a 1:1 impedance ratio

is recommended. Table 3 provides the component values

necessary to match various IF frequencies using the M/A-

COM CT0010 transformer (T1, Figure 1).

Table 3. Component Values for Input Matching Using the

M/A-COM CT0010

Z14

44MHz

1000pF

120nH

150pF

95MHz

820pF

33pF

27nH

120MHz

1000pF

27pF

18nH

150MHz

330pF

22pF

10nH

170MHz

330pF

18pF

6.8nH

250MHz

82pF

10pF

Ω

300MHz

15pF

3.9pF

Ω

435MHz

8.2pF

0.5pF

Ω

520MHz

6.8pF

Unused

Ω

Below 100MHz, the Mini-Circuits TCM2-1T or the Pulse

CX2045 are better choices for a wider input match. This

configuration is shown in Figure 4. The series 1nF capaci-

tors maintain differential symmetry while providing DC

isolation between the inputs. This helps to improve LO

suppression.

Shunt capacitor C13 (Figure 2) is an optional capacitor

across the input pins that significantly improves LO sup-

pression. Although this capacitor is optional, it is impor-

tant to regulate LO suppression, mitigating part-to-part

variation. This capacitor should be optimized depending

Figure 2. Signal Input with External Matching

Figure 3. IF Input Return Loss

VCC

IN–

IN+

OPT

LT5521

C13

IFIN

Ω

5521 F02

Z14

1nF

1:1

OPT

FREQUENCY (MHz)

100

–25

–20

–15

250

350

5521 F03

–30

–35

–40

150

200

300

–10

–5

400

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