36

Am29F800T/Am29F800B

8/18/97

PR E L IM IN A R Y

ERASE AND PROGRAMMING PERFORMANCE

Notes:

1. The typical erase and programming times assume the following conditions: 25

conditions do not apply to erase/program endurance. Programming typicals assume checkerboard pattern.

2. The maximum erase and programming times assume the following conditions: 90

3. Although Embedded Algorithms allow for longer chip program and erase time, the actual time will be considerably less since

bytes program or erase significantly faster than the worst case byte.

4. System-level overhead is defined as the time required to execute the four bus cycle command necessary to program each

byte. In the preprogramming step of the Embedded Erase algorithm, all bytes are programmed to 00H before erasure.

5. The Embedded Algorithms allow for 2.5 ms byte program time. DQ5 = “1” only after a byte takes the theoretical maximum

time to program. A minimal number of bytes may require significantly more programming pulses than the typical byte. The

majority of the bytes will program within one or two pulses. This is demonstrated by the Typical and Maximum Programming

Times listed above.

LATCHUP CHARACTERISTICS

Parameter

Limits

Unit

Comments

Typ (Note 1)

Max (Note 2)

Sector Erase Time

1.0

8

sec

Excludes 00H programming prior to

erasure

Chip Erase Time (Note 3)

19

152

sec

Byte Programming Time (Note 5)

7

300

µs

Excludes system-level overhead (Note 4)

Word Programming Time (Note 5)

14

600

µs

Chip Programming Time (Notes 3, 5)

7.2

21.6

sec

Erase/Program Endurance

1,000,000

cycles

Minimum 100,000 cycles guaranteed

Min

Max

–1.0 V

–100 mA

+100 mA