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OPA863 Datasheet(PDF) 29 Page - Texas Instruments

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Part # OPA863
Description  OPAx863 Low-Power, 110-MHz, Rail-to-Rail Input/Output Voltage-Feedback Op Amps
PDF  52 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

OPA863 Datasheet(HTML) 29 Page - Texas Instruments

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9.4.1.1 Thermal Considerations
The OPAx863 does not require heat sinking or airflow in most applications. The maximum allowed junction
temperature sets the maximum allowed internal power dissipation. Do not allow the maximum junction
temperature to exceed 150°C.
Operating junction temperature (TJ) is given by,
TJ = TA + PD x RƟJA
(4)
where
• TA is the ambient temperature
• PD is the total power dissipation internal to the amplifier
• RƟJA is the junction-to-ambient thermal resistance
The total power dissipation PD = PDQ + PDL
where
• PDQ = (VS+ ‐ VS-) x IQ, is the power dissipation due to the amplifier quiescent current
• PDL(max) = VS 2 / (4 × RL), is the internal power dissipation due to the output load current
As a worst-case example, compute the maximum TJ using an OPA2863-DGK (VSSOP package) configured as
a unity gain buffer, operating on ±6-V supplies at an ambient temperature of 25°C and driving a grounded 500-Ω
load.
PD = 12 V × 2 mA + 62 / (4 × 500 Ω) = 42 mW
(5)
Maximum TJ = 25°C + (0.042 W × 180.3°C/W) = 33°C, which is much less than the maximum allowed junction
temperature of 150°C.
9.4.2 Layout Example
Place bypass capacitors
close t o power pins
Place gain and feedback r esistors close
to pins to mi nimize str ay capacit ance
Place ser ies output resistors close
to output pin to m inimi ze
par asitic capacitance
Ground and power plane removed
from inner layers. Ground fill on outer
layer s also removed
Ground and power plane exist on inner
layer s.
Place bypass capacitors
close t o power pins
Remove GND and Power plane under
output and i nv er ting pins to m inimize
stray PCB capacitance
C
BYP
R
F
R
G
+
t
V
S-
C
BYP
V
S+
Representati ve schematic of a
single channel
1
8
2
7
3
6
4
5
R
S
C
BYP
C
BYP
R
F
R
F
R
G
R
G
R
S
R
S
Figure 9-7. Layout Recommendation for Dual-Channel DGK Package
www.ti.com
OPA863, OPA2863, OPA4863
SBOS982J – JUNE 2020 – REVISED JUNE 2023
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
29
Product Folder Links: OPA863 OPA2863 OPA4863



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