ICS951402 datasheet(9/24 Pages) RENESAS

9 / 24 page

Integrated

Circuit

Systems, Inc.

ICS951402

Advance Information

0660—05/05/05

2C Table: Watchdog Timer Register

Byte 9

Pin #

Name

Control Function Type

PWD

Bit 7

WD7

Bit 6

WD6

Bit 5

WD5

Bit 4

WD4

Bit 3

WD3

Bit 2

WD2

Bit 1

WD1

Bit 0

WD0

These bits represent

X*293ms the

watchdog timer will

wait before it goes to

alarm mode. Default

is 16 X 293ms =4.688

seconds

2C Table: WD Timer Control Register

Byte 10 Pin #

Name

Control

Function

Type

PWD

Bit 7

M/NEN

M/N Programming

Enable

Latched

Inputs

IIC Prog.

B (11:17)

Bit 6

WDEN

Watchdog Enable

Disable

Enable

Bit 5

WDStatus

WD Status Control

OFF

Bit 4

WD SF4

Bit 3

WD SF3

Bit 2

WD SF2

Bit 1

WD SF1

Bit 0

WD SF0

Writing to these bit will

configure the safe

frequency as Byte 0 Bit

(6:0

)

Note: If Byte4 bit1 = 0 then FS4=0

2C Table: VCO Frequency Control Register

Byte 11 Pin #

Name

Control

Function

Type

PWD

Bit 7

N Div8

N Divider Bit 8

Bit 6

M Div6

Bit 5

M Div5

Bit 4

M Div4

Bit 3

M Div3

Bit 2

M Div2

Bit 1

M Div1

Bit 0

M Div0

The decimal

representation of M

Div (6:0) is equal to

reference divider

value. Default at

power up = latch-in

or Byte 0 Rom table.

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