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AD8153 Datasheet(PDF) 13 Page - Analog Devices |
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AD8153 Datasheet(HTML) 13 Page - Analog Devices |
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13 / 18 page ![]() Preliminary Technical Data AD8153 Rev. PrA | Page 13 of 18 Figure 6: I2C Timing Diagram Table 9: I2C Timing Parameters Parameter Symbol Min Max Unit SCL clock frequency fSCL 0 400+ kHz Hold time for a start condition tHD;STA 0.6 - μs Set-up time for a repeated start condition tSU;STA 0.6 - μs LOW period of the SCL clock tLOW 1.3 - μs HIGH period of the SCL clock tHIGH 0.6 - μs Data hold time tHD;DAT 0 - μs Data set-up time tSU;DAT 10 - Ns Rise time for both SDA and SCL tr 1 300 Ns Fall time for both SDA and SCL tf 1 300 Ns Set-up time for stop condition tSU;STO 0.6 - μs Bus free time between a stop and a start condition tBUF 1 - Ns Capacitance for each I/O pin Ci 5 7 Pf |
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