P25Q32SL datasheet(39/111 Pages) PUYA

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P25Q32SL Datasheet

Puya Semiconductor

Page 39 of 111

10.9 Read Data Bytes (READ)

The read instruction is for reading data out. The address is latched on rising edge of SCLK, and data shifts out

on the falling edge of SCLK at a maximum frequency fR. The first address byte can be at any location. The

address is automatically increased to the next higher address after each byte data is shifted out, so the whole

memory can be read out at a single READ instruction. The address counter rolls over to 0 when the highest

address has been reached.

The sequence of issuing READ instruction is: CS# goes low→ sending READ instruction code→ 3-byte

address on SI→ data out on SO→ to end READ operation can use CS# to high at any time during data out.

Figure 10-10 Read Data Bytes (READ) Sequence (Command 03)

Command

03H

CS#

SCLK

High - Z

9 10

28 29 30 31 32 33 34 35 36 37 38 39

MSB

22 21

MSB

24 - bit address

Data Out1

Data Out2

10.10 Fast Read (FREAD)

The FAST READ instruction is for quickly reading data out. The address is latched on rising edge of SCLK,

and data of each bit shifts out on the falling edge of SCLK at a maximum frequency fC. The first address byte

can be at any location. The address is automatically increased to the next higher address after each byte data

is shifted out, so the whole memory can be read out at a single FREAD instruction. The address counter rolls

over to 0 when the highest address has been reached.

The sequence of issuing FREAD instruction is: CS# goes low→ sending FREAD instruction code→3-byte

address on SI→ 1-dummy byte address on SI→data out on SO→ to end FREAD operation can use CS# to

high at any time during data out.

While Program/Erase/Write Status Register cycle is in progress, FREAD instruction is rejected without any

impact on the Program/Erase/Write Status Register current cycle.

Figure 10-10 Fast Read (FREAD) Sequence (Command 0B)

Command

0BH

CS#

SCLK

High - Z

9 10

28 29 30 31

23 22

24-bit address

MSB

Data Out1

Data Out2

CS#

SCLK

MSB

DummyByte

32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49

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