AD7323 datasheet(31/36 Pages) AD

31 / 36 page

AD7323

Rev. 0 | Page 31 of 36

POWER VS. THROUGHPUT RATE

The power consumption of the AD7323 varies with throughput

rate. The static power consumed by the AD7323 is very low, and

significant power savings can be achieved as the throughput

rate is reduced. Figure 49 and Figure 50 shows the power vs.

throughput rate for the AD7323 at a VCC of 3 V and 5 V,

respectively. Both plots clearly show that the average power

consumed by the AD7323 is greatly reduced as the sample

frequency is reduced. This is true whether a fixed SCLK value is

used or if it is scaled with the sampling frequency. Figure 49 and

Figure 50 show the power consumption when operating in

normal mode for a variable SCLK that scales with the sampling

frequency.

THROUGHPUT RATE (kSPS)

100

200

300

400

500

VARIABLE SCLK

VCC =3V

VDD/VSS = ±12V

TA =25°C

INTERNAL REFERENCE

Figure 49. Power vs. Throughput Rate with 3 V VCC

THROUGHPUT RATE (kSPS)

100

200

300

400

500

VARIABLE SCLK

VCC =5V

VDD/VSS =±12V

TA =25°C

INTERNAL REFERENCE

Figure 50. Power vs. Throughput Rate with 5 V VCC

AD7323 Datasheet(PDF) 31 Page - Analog Devices