AD2S1205 datasheet(18/25 Pages) AD

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AD2S1205

Preliminary Technical Data

Rev.PrB | Page 18 of 25

After a rising edge on the RESET input, the device must be

allowed at least 20 ms (tTRACK) as shown in Figure 10 for internal

circuitry to stabilize and the tracking loop to settle to the step

change in input position. After tTRACK, a SAMPLE pulse must be

applied, releasing the LOT and DOT pins to the state deter-

mined by the fault detection circuitry and providing valid

position data at the parallel and serial outputs (note that if

position data is being acquired via the encoder outputs, they

may be monitored during tTRACK).

The RESET pin is internally pulled up.

tRST

VDD

RESET

4.75V

VALID

OUTPUT

DATA

SAMPLE

LOT

DOS

tTRACK

Figure 10. Power Supply Sequencing and Reset

CHARGE PUMP OUTPUT

A 204.8 kHz square wave output with 50% duty cycle is avail-

able at the CPO output pin of the AD2S1205. This square wave

output can be used for negative rail voltage generation, or to

create a VCC rail.

AD2S1205 Datasheet(PDF) 18 Page - Analog Devices