LTM4709

17

Rev. 0

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enclosure. This environment is sometimes referred to

as still air, although natural convection causes the

air to move. This value is determined with the part

mounted to a four-layer EVAL-LTM4709-BZ evaluation

board.

2. θJCbottom, the thermal resistance from the junction to

the bottom of the product case, is determined with all

the component power dissipation flowing through the

bottom of the package. In the typical module regulator,

the bulk of the heat flows out the bottom of the pack-

age, but there is always heat flow out into the ambient

environment. As a result, this thermal resistance value

may be useful for comparing packages, but the test

conditions don’t generally match the user’s application.

3. θJCtop, the thermal resistance from the junction to

the top of the product case, is determined with all the

component power dissipation flowing through the top

of the package. As the electrical connections of the

typical μModule regulator are on the bottom of the

package, it is rare for an application to operate such

that most of the heat flows from the junction to the top

of the part. As a result, this thermal resistance value

may be useful for comparing packages, but the test

conditions don’t generally match the user’s application.

A graphical representation of the thermal resistances is

shown in Figure 6; blue resistances are contained within

the μModule regulator, whereas green resistances are

external to the μModule.

As a practical matter, it should be clear to the reader that

no individual or subgroup of the three thermal resistance

parameters defined by JESD51-12 or provided in the Pin

Configuration section replicates or conveys normal oper-

ating conditions of a μModule. For example, in normal

board-mounted applications, never does 100% of the

device’s total power loss (heat) thermally conduct exclu-

sively through the top or exclusively through the bottom

of the μModule—as the standard defines for θJCtop and

θJCbottom, respectively. In practice, power loss is ther-

mally dissipated in both directions away from the pack-

age—granted, in the absence of a heat sink and airflow,

most of the heat flow is into the board.

Within the LTM4709 module, be aware that there are

multiple power devices dissipating power, with the

consequence that the thermal resistances relative to

different junctions of components or die are not exactly

linear with respect to total package power loss. To

reconcile this complication without sacrificing modeling

simplicity—but also, not ignoring practical realities—an

approach has been taken using FEA software modeling

along with laboratory testing in a controlled environment

chamber to reasonably define and correlate the thermal

resistance values supplied in this data sheet: (1) Initially,

FEA software is used to accurately build the mechanical

geometry of the μModule and the specified PCB with all

of the correct material coefficients along with accurate

power loss source definitions; (2) this model simulates

a software defined JEDEC environment consistent with

JSED51-12 to predict power loss heat flow and tempera-

ture readings at different interfaces that enable the cal-

culation of the JEDEC-defined thermal resistance values;

(3) the model and FEA software is used to evaluate the

LTM4709 with and without airflow; (4) having solved for

and analyzed these thermal resistance values and simu-

lated various operating conditions in the software model,

APPLICATIONS INFORMATION

Figure 6. Graphical Representation of JESD51-12 Thermal Coefficients, Including JESD51-12 Terms

4709 F06

µModule DEVICE

θJCtop JUNCTION-TO-CASE

(TOP) RESISTANCE

θJA JUNCTION-TO-AMBIENT RESISTANCE

CASE (TOP)-TO-AMBIENT

RESISTANCE

BOARD-TO-AMBIENT

RESISTANCE

θJCbot JUNCTION-TO-CASE

(BOTTOM) RESISTANCE

JUNCTION

AMBIENT

CASE (BOTTOM)-TO-BOARD

RESISTANCE