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CS3318 Datasheet(PDF) 38 Page - Cirrus Logic |
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CS3318 Datasheet(HTML) 38 Page - Cirrus Logic |
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38 / 44 page ![]() 38 DS693F1 CS3318 In the equation above, “Desired Volume Setting in dB” is determined by rounding the desired ¼ dB resolution volume setting down to ½ dB resolution. It should be noted that input values outside the CS3318’s analog range of +22 dB to -96 dB are valid; however, the volume of each channel will be limited to the CS3318’s analog range (see “Volume Lim- its” on page 20). See Table 5 on page 31 for example register settings. 7.14 Master 2 Control - Address 15h 7.14.1 Master 2 Mute (Bit 1) Default = 0 Function: This bit controls the Master 2 mute state. When set, the Master 1 mute condition is active. When cleared, the Master 2 mute condition is released. See “Muting Controls” on page 21 for more information about the muting behavior of the CS3318. 7.14.2 Master 2 ¼ dB Control (Bit 0) Default = 0 Function: When set, ¼ dB of gain will be added to the Master 2 volume level. See Table 6 on page 32 for an example of volume settings using the ¼ dB control. 7.15 Master 3 Mask - Address 16h Each bit in this register serves as a Master 3 mask for its corresponding channel. If a mask bit is set to ‘1’, the corresponding channel is unmasked, meaning that it will be affected by the Master 3 volume and muting controls. If a mask bit is set to ‘0’, the corresponding channel is masked, meaning that it will not be affected by the Master 3 volume and muting controls. This register defaults to FFh (all channels unmasked). 7.16 Master 3 Volume - Address 17h 7.16.1 Master 3 Volume Control (Bits 7:0) Default = 11010010 Function: The Master 3 volume control register allows the user to simultaneously gain or attenuate all un- masked channels from +22 dB to -96 dB in 0.5 dB increments. The volume changes are implemented 76 543 21 0 Reserved Reserved Reserved Reserved Reserved Reserved M2_Mute M2_Qtr 76 543 21 0 M3_Ch8M M3_Ch7M M3_Ch6M M3_Ch5M M3_Ch4M M3_Ch3M M3_Ch2M M3_Ch1M 76 543 21 0 M3_Vol7 M3_Vol6 M3_Vol5 M3_Vol4 M3_Vol3 M3_Vol2 M3_Vol1 M3_Vol0 |
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