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CS5464 Datasheet(PDF) 6 Page - Cirrus Logic |
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CS5464 Datasheet(HTML) 6 Page - Cirrus Logic |
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6 / 46 page ![]() CS5464 6 DS682PP1 2. PIN DESCRIPTION Clock Generator Crystal Out Crystal In 1,28 XOUT, XIN - The output and input of an inverting amplifier. Oscillation occurs when connected to a crystal, providing an on-chip system clock. Alternatively, an external clock can be supplied to the XIN pin to provide the system clock for the device. CPU Clock Output 2 CPUCLK - Output of on-chip oscillator which can drive one standard CMOS load. Control Pins and Serial Data I/O Serial Clock Input 5 SCLK - A Schmitt Trigger input pin. Clocks data from the SDI pin into the receive buffer and out of the transmit buffer onto the SDO pin when CS is low. Serial Data Output 6 SDO -Serial port data output pin.SDO is forced into a high impedance state when CS is high. Chip Select 7 CS - Low, activates the serial port interface. Mode Select 8 MODE - High, enables the “auto-boot” mode. The mode pin is pull-down by an internal resistor. Energy Output 22, 25, 26 E3, E1, E2 - Active low pulses with an output frequency proportional to energy. Reset 23 RESET - A Schmitt Trigger input pin. Low activates Reset, all internal registers (some of which drive output pins) are set to their default states. Interrupt 24 INT - Low, indicates that an enabled event has occurred. Serial Data Input 27 SDI - Serial port data input pin. Data will be input at a rate determined by SCLK. Analog Inputs/Outputs Differential Voltage Inputs 9,10 VIN+, VIN- - Differential analog input pins for the voltage channel. Differential Current Inputs 19,20, 15,16 IIN+, IIN-, IIN2+, IIN2- - Differential analog input pins for the current channel. Voltage Reference Output 11 VREFOUT - The on-chip voltage reference output. The voltage reference has a nominal magni- tude of 2.5 V and is referenced to the AGND pin on the converter. Voltage Reference Input 12 VREFIN - The input to this pin establishes the voltage reference for the on-chip modulator. Power Supply Connections Positive Digital Supply 3 VD+ - The positive digital supply. Digital Ground 4 DGND - Digital Ground. Positive Analog Supply 18 VA+ - The positive analog supply. Analog Ground 17 AGND - Analog ground. Power Fail Monitor 21 PFMON - The power fail monitor pin monitors the analog supply. If PFMON’s voltage threshold is tripped, a Low-Supply Detect (LSD) event is set in the status register. Test Connections Factory Test 13,14 TEST1, TEST2 - Factory use only. Connect to AGND. VREFIN 12 Voltage Reference Input VREFOUT 11 Voltage Reference Output VIN- 10 Differential Voltage Input VIN+ 9 Differential Voltage Input MODE 8 Mode Select CS 7 Chip Select SDO 6 Serial Data Ouput SCLK 5 Serial Clock DGND 4 Digital Ground VD+ 3 Positive Digital Supply CPUCLK 2 CPU Clock Output XOUT 1 Crystal Out AGND 17 Analog Ground VA+ 18 Positive Analog Supply IIN- 19 Differential Current Input IIN+ 20 Differential Current Input PFMON 21 Power Fail Monitor E3 22 Energy Output 3 RESET 23 Reset INT 24 Interrupt E1 25 Energy Output 1 26 SDI 27 Serial Data Input XIN 28 Crystal In E2 Energy Output 2 TEST2 14 Factory Test TEST1 13 Factory Test IIN2- 15 Differential Current Input IIN2+ 16 Differential Current Input |
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