CS5535 datasheet(475/555 Pages) NSC

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MFGPT Register Descriptions (Continued)

5.17.2.4

MFGPT[x] Setup (MFGPT[x]_SETUP)

MFGPT0 to MFGPT5 Setup registers are in the Working power domain while MFGPT6 and MFGPT7 Setup registers are in

the Standby power domain. Bits [11:0] are write-once; bit 12 is read-only.

MFPGT0 Setup (MFGPT0_SETUP)

MFPGT1 Setup (MFGPT1_SETUP)

MFPGT2 Setup (MFGPT2_SETUP)

MFPGT3 Setup (MFGPT3_SETUP)

MFPGT4 Setup (MFGPT4_SETUP)

MFPGT5 Setup (MFGPT5_SETUP)

MFPGT6 Setup (MFGPT6_SETUP)

MFPGT7 Setup (MFGPT7_SETUP)

MFGPT I/O Offset

06h

Type

R/W

Reset Value

0000h

MFGPT I/O Offset

0Eh

Type

R/W

Reset Value

0000h

MFGPT I/O Offset

16h

Type

R/W

Reset Value

0000h

MFGPT I/O Offset

1Eh

Type

R/W

Reset Value

0000h

MFGPT I/O Offset

26h

Type

R/W

Reset Value

0000h

MFGPT I/O Offset

2Eh

Type

R/W

Reset Value

0000h

MFGPT I/O Offset

36h

Type

R/W

Reset Value

0000h

MFGPT I/O Offset

3Eh

Type

R/W

Reset Value

0000h

MFGPT[x]_SETUP Register Map

MFGPT_CMP2

MODE

MFGPT_CMP1

MODE

MFGPT_SCALE

MFGPT[x]_SETUP Bit Descriptions

Bit

Name

Description

MFGPT_CNT_EN

Counter Enable. Enable MFGPT for counting. 0: Disable; 1: Enable.

MFGPT_CMP2

Compare 2 Output Status. If Conditioning Mode is set to Event, writing this bit to

a 1 clears the event until the next time Compare 2 goes from low-to-high; reading

returns the event status. For other modes, this bit follows current compare output

values and writes to this bit have no effect.

MFGPT_CMP1

Compare 1 Output Status. If Conditioning Mode is set to Event, writing this bit to

a 1 clears the event until the next time Compare 1 goes from low-to-high; reading

returns the event status. For other modes, this bit follows current compare output

values and writes to this bit have no effect.

MFGPT_SETUP (RO)

Setup (Read Only). Any value written to this bit is a ‘don’t care’. From reset, this

bit is low. If low, it indicates the MFGPT has not been setup and is currently dis-

abled. On the first write to this register, bits [11:0] are established per the write

and this bit is set to a 1. After this bit is set on the first write, bits [12:0] cannot be

changed and subsequent writes are ‘don’t care’.

MFGPT_STOP_EN

Stop Enable. Enable counter to Stop on Sleep state for MFGPT0 to MFGPT5, or

Standby state for MFGPT6 and MFGPT7. 0: Disable; 1: Enable.

MFGPT_EXT_EN

External Enable. External pin enabled to be MFGPT clear input. 0: Disable;

1: Enable.

CS5535 Datasheet(PDF) 475 Page - National Semiconductor (TI)

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