CS5535 datasheet(479/555 Pages) NSC

479 / 555 page

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479

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PMC Register Descriptions (Continued)

5.18.1 PMC Specific MSRs

5.18.1.1

PMC Logic Timer (PMC_LTMR)

5.18.1.2

PMC Reserved (PMC_RSVD)

5.18.2 ACPI Registers

5.18.2.1

PM Status 1 (PM1_STS)

PM1_STS is the Status register for Timer Carry, Button, and RTC Alarm wakeup events. All bits in this register are cleared

by the Standby state except bits 15, 10, and 8. They maintain their state through Standby.

MSR Address

51400050h

Type

R/W

Reset Value

00000000h

PMC_LTMR Register Map

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9876543210

MSR_PML_TMR

PMC_LTMR Bit Descriptions

Bit

Name

Description

31:0

MSR_PML_TMR

Legacy Power Management Timer. 32-Bit write / read of timer counter.

Writes initialize the counter value; reads return current timer counter value.

MSR Address

51400051h

Type

R/W

Reset Value

00000000h

PMC_RSVD Register Map

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9876543210

PMC_RSVD

MSR_PML_RSVD Bit Descriptions

Bit

Name

Description

31:0

PMC_RSVD

Reserved. This is a reserved register and should not be accessed by user software.

By convention write 0, but other values are “don’t care”. Reads always return 0.

ACPI I/O Offset

00h

Type

R/W

Reset Value

0000h

PM1_STS Register Map

WAK_

FLAG

RSVD

IGNORE RTC_

FLAG

SLPBTN

_FLAG

PWRBTN

_FLAG

RSVD

GBL_

FLAG

BM_

FLAG

RSVD

TMR_

FLAG

CS5535 Datasheet(PDF) 479 Page - National Semiconductor (TI)

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