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CS5535 Datasheet(PDF) 544 Page - National Semiconductor (TI) |
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CS5535 Datasheet(HTML) 544 Page - National Semiconductor (TI) |
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544 / 555 page ![]() www.national.com 544 Revision 0.8 Electrical Specifications (Continued) 6.3.9 Low Pin Count (LPC) Signals The signals detailed in this sub-section use a “PCI” buffer type except for LCP_CLK. LPC_CLK uses a “Q7” buffer. For a detailed explanation of buffer types, see Table 2-4 "Buffer Type Characteristics" on page 28. In this subsection, unless otherwise noted: • All timing specifications are specified under the oper- ating conditions listed in Table 6-3 on page 526 (i.e., VCORE and VCORE_VSB = All; VIO and VIO_VSB = All; TCASE = All). • Signals are referenced to LPC_CLK low-to-high edge. • Signal parameters are defined in Figure 6-2 "AC Refer- ence Timing and Test Definition" on page 530. Table 6-17. LPC Timing Parameters Signal Parameter Min Max Units Comment/Condition LPC_FRAME#, LPC_AD[3:0], LPC_DRQ#, LPC_SERIRQ tVAL when signal is an output 2 11 ns Note 1 and Note 2. tFLOAT when signal is an output NA 11 ns Note 2 and Note 3. tENABLE when signal is an output 2 NA ns Note 2 and Note 4. tSETUP when signal is an input 7 NA ns Note 2. tHOLD when signal is an input 0 NA ns Note 2. Note 1. tVAL min times with load of: 10 pF cap to ground. tVAL max times with load of: 50 pF cap to ground. Note 2. All information in this table applies when the following control bits are high in Table 2-6 "DIVIL_BALL_OPT" on page 29: PIN_OPT_LDRQ, PIN_OPT_LIRQ, and PIN_OPT_LALL. Note 3. tFLOAT with the load of: 10 pF cap to ground. Note 4. tENABLE with the load of: 10 pF cap to ground. |
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