CS5535 datasheet(545/555 Pages) NSC

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Electrical Specifications (Continued)

6.3.10 Power Management and Processor Control Signals

The Power Management Controller (PMC) signals detailed

in this sub-section use various types of buffers depending

upon chip configuration. For a detailed explanation of buffer

types, see Table 2-4 "Buffer Type Characteristics" on page

28.

In this subsection, unless otherwise noted:

• All timing specifications are specified under the oper-

ating conditions listed in Table 6-3 on page 526 (i.e.,

VCORE and VCORE_VSB = All; VIO and VIO_VSB = All;

TCASE = All).

• No clock reference.

Table 6-18. Power Management and Processor Control Timing Parameters

Signal

Parameter

Min

Max

Units

Comment/Condition

WORKING

Async Output or Level

From PMC.

RESET_OUT#

Sync Output to PCI_CLK

See RESET_OUT# in Table 6-9

on page 534.

THRM_ALRM# (GPIO10)

Async Input

Note 1. To PMC.

SLP_CLK_EN (GPIO11)

Async Output or Level

Note 2. From PMC.

WORK_AUX (GPIO24)

Async Output or Level

Note 2. From PMC.

LOW_BAT# (GPIO25)

Async Input

Note 1. To PMC.

PWR_BUT# (GPIO28)

Async Input

Note 1. To PMC.

INTR_OUT (GPIO12)

Async Output or Level

Note 2. From PIC subsystem.

SMI_OUT# (GPIO13)

Async Output or Level

Note 2. From GLIU.

SUSP#, SUSPA#

Sync to PCI_CLK

See Table 6-9 on page 534 for

SUSP#, SUSPA# data.

IRQ13

Async Input

To PIC subsystem.

SLEEP_X (GPIO7)

Async Output or Level

Note 3. From PMC.

SLEEP_Y (GPIO12)

Async Output or Level

Note 3. From PMC.

SLEEP_BUT (GPIO13)

Async Input

Note 1. To PMC.

Note 1. GPIO configured: AUX_IN and Input Enable = 1; Output Enable, AUX_OUT_1, and AUX_OUT_2 = 0.

Note 2. GPIO configured: AUX_IN and Input Enable = 0; Output Enable and AUX_OUT_1 = 1; Open-drain and

AUX_OUT_2 = 0.

Note 3. GPIO configured: AUX_IN and Input Enable = 0; Output Enable and AUX_OUT_2 = 1; Open-drain and

AUX_OUT_1 = 0.

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