UPD67B datasheet(49/73 Pages) RENESAS

49 / 73 page

µPD67B, 68B

Data Sheet U16792EJ1V1DS

9.7 Branch Instructions

The program memory consists of pages in steps of 1K (000H to 3FFH). However, as the assembler automatically

performs page optimization, it is unnecessary to designate pages. The pages allowed for each product are as

follows.

µPD67B (ROM: 1K steps):

Page 0

µPD68B (ROM: 2K steps):

Pages 0, 1

JMP addr

<1> Instruction code:

Page 0

0100010001

; page 1 0100110001

a9 a7 a6 a5 a4 a8 a3 a2 a1 a0

<2> Cycle count:

<3> Function:

← addr

The 10 bits (PC9-0) of the program counter are replaced directly by the specified address addr (a9 to

a0).

JC addr

<1> Instruction code:

Page 0

0110010001

; page 1 0101010001

a9 a7 a6 a5 a4 a8 a3 a2 a1 a0

<2> Cycle count:

<3> Function:

CY = 1

← addr

else

← PC + 2

If the carry flag CY is set (to 1), a jump is made to the address specified by addr (a9 to a0).

JNC addr

<1> Instruction code:

Page 0

0110110001

; page 1 0101110001

a9 a7 a6 a5 a4 a8 a3 a2 a1 a0

<2> Cycle count:

<3> Function:

CY = 0

← addr

else

← PC + 2

If the carry flag CY is cleared (to 0), a jump is made to the address specified by addr (a9 to a0).

JF addr

<1> Instruction code:

Page 0

0111010001

; page 1 1000010001

a9 a7 a6 a5 a4 a8 a3 a2 a1 a0

<2> Cycle count:

<3> Function:

F = 1

← addr

else

← PC + 2

If the status flag F is set (to 1), a jump is made to the address specified by addr (a9 to a0).

JNF addr

<1> Instruction code:

Page 0

0111110001

; page 1 1000110001

a9 a7 a6 a5 a4 a8 a3 a2 a1 a0

<2> Cycle count:

<3> Function:

F = 0

← addr

else

← PC + 2

If the status flag F is cleared (to 0), a jump is made to the address specified by addr (a9 to a0).

UPD67B Datasheet(PDF) 49 Page - Renesas Technology Corp

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