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TMUX4051DYYR Datasheet(PDF) 22 Page - Texas Instruments

Part # TMUX4051DYYR
Description  TMUX405x 24-V, 8:1, 1-Channel, 4:1, 2-Channel and 2:1, 3-Channel Multiplexers with 1.8-V Logic
PDF  42 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TMUX4051DYYR Datasheet(HTML) 22 Page - Texas Instruments

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9 Detailed Description
9.1 Overview
The TMUX4051 is an 8:1, single-ended (1-channel) mux, the TMUX4052 is a 4:1, differential (2-channel)
multiplexer, and the TMUX4053 is 2:1, 3 channel switch. Each channel is turned on or turned off based on the
state of the address lines and enable pin.
9.2 Functional Block Diagram
TMUX4051
A2
A1
A0
EN
S2
D
S3
S4
S5
S6
S7
S0
1-OF-8
DECODER
TMUX4052
S0A
DB
S1A
S2A
S3A
S0B
S1B
S2B
S3B
DA
A1
A0
EN
1-OF-4
DECODER
TMUX4053
S1A
S1B
D1
S2A
S2B
D2
S3A
S3B
D3
EN
SEL3
SEL2
SEL1
S1
LOGIC CONTROL
9.3 Feature Description
9.3.1 Bidirectional Operation
The TMUX4051, TMUX4052, and TMUX4053 devices conduct equally well from source (Sx) to drain (Dx) or
from drain (Dx) to source (Sx). Each signal path has very similar characteristics in both directions so they can be
used as both multiplexers and demultiplexer to support analog signals.
9.3.2 Rail-to-Rail Operation
The valid signal path input and output voltage for the TMUX4051, TMUX4052, and TMUX4053 ranges from VSS
to VDD.
9.3.3 1.8 V Logic Compatible Inputs
The TMUX4051, TMUX4052, and TMUX4053 support 1.8-V logic compatible control for all logic control inputs.
1.8-V logic level inputs allows the multiplexers to interface with processors that have lower logic I/O rails
and eliminates the need for an external voltage translator, which saves both space and BOM cost. For more
information on 1.8-V logic implementation, refer to Simplifying Design with 1.8 V logic Muxes and Switches.
9.3.4 Device Functional Modes
When the EN pin of the TMUX405x devices is pulled low, one of the switches is closed based on the state of the
address or select pins. When the EN pin is pulled high, all the switches are in an open state regardless of the
state of the address or select pins.
Unused logic control pins must be tied to GND or VDD to be certain that the device does not consume additional
current as highlighted in Implications of Slow or Floating CMOS Inputs. Unused signal path inputs (Sx and Dx)
should be connected to GND.
TMUX4051, TMUX4052, TMUX4053
SCDS445B – MAY 2022 – REVISED MARCH 2023
www.ti.com
22
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Copyright © 2023 Texas Instruments Incorporated
Product Folder Links: TMUX4051 TMUX4052 TMUX4053



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