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UPD17062 Datasheet(PDF) 148 Page - Renesas Technology Corp |
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UPD17062 Datasheet(HTML) 148 Page - Renesas Technology Corp |
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148 / 298 page  146 µPD17062 The program shown below is an example of a program that meets the above condition. Do not creates such a program. Example Process A INITFLG NOT BTM0ZX, NOT BTM0CK2, NOT BTM0CK1, BTM0CK0 ; Built-in macro ; Specifies the timer carry FF set pulse as 5 ms. LOOP: ; # SKT1 BTM0CY ; Built-in macro BR BBB AAA: 496 steps BR LOOP BBB: 496 steps BR LOOP Because the BTM0CY flag read instruction at # in this program is executed at every 500 instructions, once the BTM0CY flag happens to be set at the timing of the instruction at #, a CE reset will not occur forever. In addition, because the instruction execution time is 12 µs (1/83.33 kHz) during the operation of the IDC, do not create a cyclic program that meets the following condition. tSET × 83.33 = n (n is any integer) x where tSET : BTM0CY flag setting time interval x : BTM0CY flag read instruction cycle time x number of steps |
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