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UPD17062 Datasheet(PDF) 149 Page - Renesas Technology Corp |
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UPD17062 Datasheet(HTML) 149 Page - Renesas Technology Corp |
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149 / 298 page ![]() 147 µPD17062 12.5 TIMER INTERRUPT The timer interrupt function issues an interrupt request at the negative-going edge of the timer interrupt pulse specified in the timer mode select register. The timer interrupt request corresponds to the IRQBTM0 flag in the interrupt request register on a one-to- one basis. When an interrupt is requested, the corresponding IRQBTM0 flag is set to 1. In other words, when a timer interrupt request pulse falls, the IRQBTM0 flag is set to 1. As described in Chapter 11, to use the timer interrupt function, it is necessary not only to issue an interrupt request but also to execute the EI instruction, which enables all interrupts, and enable the timer interrupt. The timer interrupt is enabled by setting the IPBTM0 flag to 1 in the interrupt permission register. To put in another way, if the EI instruction has been executed, and the IPBTM0 flag is set to 1, an interrupt request is accepted when the IRQBTM0 flag is set to 1. When a timer interrupt request is accepted, program control is passed to program memory address 0003H. When the interrupt request is accepted, the IRQBTM0 flag is reset to 0. Fig. 12-8 shows the relationship between the timer interrupt pulse and the IRQBTM0 flag. Fig. 12-8 Relationship Between the Timer Interrupt Pulse and the IRQBTM0 Flag # IRQBTM0 IPBTM0 INTE FF EI DI Timer interrupt pulse The negative-going edge of the timer interrupt pulse sets the IRQBTM0 flag. The EI instruction is executed, but the interrupt request is not accepted because the IPBTM0 flag is not set. The timer interrupt request is accepted at the same time the IPBTM0 flag is set. Timer interrupt request accepted Interrupt pending Interrupt enabled At this point, note the following: Once the IRQBTM0 flag is set when a timer interrupt is disabled by the DI instruction or the IPBTM0 flag, the corresponding interrupt request is accepted immediately when the EI instruction is executed or the IPBTM0 flag is set. In the above case, writing 0 to the IRQBTM0 flag can cancel the interrupt request. Meanwhile, writing 1 to the IRQBTM0 flag amounts to issuing an interrupt request. Accepting a timer interrupt request uses one level of stack. When an interrupt request is accepted, the contents of the bank register and index enable flag are saved automatically. A RETI instruction is used to return from an interrupt handling routine. This instruction is dedicated to use for this purpose. See Chapters 4 and 11 for details. Sections 12.5.1 and 12.5.2 describe an example of using a timer interrupt and a timer interrupt error, respectively. See Chapter 11 for relationships with other types of interrupts (INTNC pin, VSYNC pin, and serial interface). |
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