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BTD21520 Datasheet(PDF) 12 Page - BASIC SEMICONDUCTOR

Part # BTD21520
Description  Dual-Channel Isolated Gate Driver
PDF  19 Pages
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Manufacturer  BASICSEMI [BASIC SEMICONDUCTOR]
Direct Link  https://www.basicsemi.com/
Logo BASICSEMI - BASIC SEMICONDUCTOR

BTD21520 Datasheet(HTML) 12 Page - BASIC SEMICONDUCTOR

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Rev.0.0
Dual-ChannelIsolatedGateDriver
BTD21520x
9.3InputStageCharacteristics
With input pins and secondary side completely isolated, BTD21520 is designed to be compatible with CMOS levels, and
supports 3.3V, 5V and 15V level input, making the chip easy to accept control of multiple logic levels.Inputs with Schmitt
stage for improved anti-interference performance.INx, PWM, and DIS have a built-in 200kΩ resistor pulled down to the
ground, ensuring that the output of the device is low when input left open. However, in order to ensure the initial pow-
er-on state of the device, BASiC recommends adding an appropriate pull-up or pull-down resistor to the input.
9.4OutputBoosterCharacteristic
The BTD21520 has a rail-to-rail booster stage output. The pull-up structure of the output stage consists of
a P-channel MOSFET and an N-channel MOSFET connected in parallel. At turn-on, N-channel MOSFET provides
high current driving capability. P-channel MOSFET provides a small steady-state conduction voltage drop during
steady conduction. The PMOS on-resistance (RPMOS_ON) is 6.5Ω, and the NMOS on-resistance (RNMOS_ON) is 0.5Ω.
The pull-down structure is implemented using an N-channel MOSFET. A 1MΩ resistor is connected in parallel between
the drain and gate of the MOSFET to effectively clamp the gate voltage of the power device in the event of a loss of pow-
er on the chip to prevent the occurrence of partial turn-on.However, in order to ensure reliable shutdown of the power
device, BASiC recommends that appropriate pull-down resistor be added to the gate.
Figure8.OutputCharacteristicsDiagram
9.5DeviceFunction
9.5.1Disable
When the DIS pin is set to a high level, both outputs can be shut down at the same time. The device operates normally
when the DIS pin is grounded or left open. The response time of the disable function is within 20ns. The disable function
is activated or deactivated according to the setting only when the VCC is kept above the undervoltage turn-on threshold.
If the DIS pin is not used, it is recommended to connect it to the ground. If connecting DIS pin to a microcontroller with
distance, it is recommended to bypass the DIS pin with a low ESR/ESL capacitor of approximately 1nF for better noise
immunity.
9.5.2PullingDTPinUptoVCC
The two channels are independent, with output exactly matching input, and no dead time is inserted, allowing the out-
put signals to be both high.
9.5.3DeadTimeSetting
DT pin sets the dead time.It is used to set the dead time between channel 1 and channel 2 to prevent them from shoot-
through. The steady-state voltage of DT pin is 0.8V, and the current value of the pin is measured for corresponding dead
time. The dead time is calculated as TDT=10×RDT. The unit of tDT is ns and the unit of RDT is kΩ. To ensure that the pin
signal is not interfered, it is recommended to place a 2.2nF capacitor near the IC between DT pin and GND, and it is not
recommended to left DT pin open.
VEE
VDD
Level Shifting and
Control Logic
RPMOS_ON
RNMOS_ON
ROL
OUT



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