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RT5510 Datasheet(PDF) 41 Page - Richtek Technology Corporation |
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RT5510 Datasheet(HTML) 41 Page - Richtek Technology Corporation |
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41 / 52 page ![]() RT5510 Copyright © 2019 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation DS5510-00 October 2019 www.richtek.com 41 Address Byte Bits Bits Name Default Type Description 0x11 1 7 I2S_LOSS_DET_EN 1 R/W 0 : Disable BCK/LRCK LOSS auto-detect 1 : Enable BCK/LRCK LOSS auto-detect (default) 6 BCK_STABLE_CHK_ EN 1 R/W 0 : Disable BCK stable and valid check 1 : Enable BCK stable and valid check (default) 5 MODE_DET_EN 1 R/W 0 : Disable sampling rate auto-detect and write SR_MODE/BCK_MODE to indicate the sampling rate and BCK mode 1 : Enable SR & BCK mode auto-detect and read SR_MODE/BCK_MODE will return the detection result (default) 4 DSP_MODE_SEL 0 R/W 0 : DSP mode A (default) 1 : DSP mode B 3 TDM_OFFSET 0 R/W The number of bits between the frame sync signal transitioning and data being driven on the data line 0 : The first data can be sampled at the first BCK rising edge after FSYNC rising edge (default) 1 : The first data can be sampled at the second BCK rising edge after FSYNC rising edge 2:0 AUD_FMT 000 R/W 000 : I2S (default) 001 : Left justify mode 010 : Right justify mode 011 : DSP mode 100 : 8 TDM slots (slot #0 to slot #7) 101 : 16 TDM slots (slot #0 to slot #15) 110 : 32 TDM slots (slot #0 to slot #31) 111 : Reserved |
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