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MAQ430 Datasheet(PDF) 15 Page - MPS Industries, Inc. |
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MAQ430 Datasheet(HTML) 15 Page - MPS Industries, Inc. |
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15 / 30 page ![]() MAQ430 – 12-BIT, AUTOMOTIVE ANGLE SENSOR WITH ABZ & UVW OUTPUTS MAQ430 Rev. 1.2 www.MonolithicPower.com 15 8/8/2022 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2022 MPS. All Rights Reserved. SPI Write Register Table 5 shows the programmable 8-bit registers. Data written to these registers are stored in the on-chip non-volatile memory and reloaded automatically during power on. The factory default register values are shown in Table 6. A write register operation is constituted of two 16-bit frames. The first frame sends a write request which contains the 3-bit write command (100) followed by the 5-bit register address and the 8-bit value (MSB first). The second frame returns the newly written register value (acknowledge). The on-chip memory is guaranteed to endure 1,000 write cycles at 25°C. It is important to wait 20ms between the first and the second frame. This is the time taken to write the non-volatile memory. Failure to implement this wait period results in the register ’s previous value being read. Note that this delay is only required after a write request. A read register request and read angle do not require this wait time. The first 16-bit SPI frame (write request) is: MSB LSB MISO Angle(15:0) command reg. address reg. value MOSI 1 0 0 A4 A3 A2 A1 A0 V7 V6 V5 V4 V3 V2 V1 V0 The second 16-bit SPI frame (response) is: reg. value MISO V7 V6 V5 V4 V3 V2 V1 V0 0 0 0 0 0 0 0 0 MSB LSB MOSI 0 The read-back register content can be used to verify the register programming. See Figure 13 for a complete transmission overview. For example, to set the value of the output rotation direction (RD) to counterclockwise (high), write register 9 by sending the following first frame: MSB LSB MISO Angle(15:0) command reg. address reg. value MOSI 1 0 0 0 1 0 0 1 1 0 0 0 0 0 0 0 Send the second frame after a 20ms wait time. If the register is correctly written, the reply is: reg. value MISO 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MSB LSB MOSI 0 See Figure 14 for a complete example. Figure 13: Overview of Two 16-Bit Frames Write Register Operation |
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