WM8706SEDSSLASHR datasheet(17/26 Pages) WOLFSON

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WM8706

Production Data

PD Rev 4.1 July 2005

ADDRESS

A2, A1, A0

BITS

LABEL

DEFAULT

DESCRIPTION

[7:0]

LAT[7:0]

11111111 (0dB)

Attenuation data for left channel in 0.5dB steps.

000

A2, A1, A0

DACL

Attenuation

UPDATEL

Attenuation data load control for left channel.

0: Store DACL in intermediate latch (no change to output)

1: Store DACL and update attenuation on all channels.

[7:0]

RAT[7:0]

11111111 (0dB)

Attenuation data for right channel in 0.5dB steps.

001

DACR

Attenuation

UPDATER

Attenuation data load control for right channel.

0: Store DACR in intermediate latch (no change to output)

1: Store DACR and update attenuation on all channels.

MUT

Left and right DACs soft mute control.

0: No mute

1: Mute

DEEMPH

De-emphasis control.

0: De-emphasis off

1: De-emphasis on

PWDN

Left and Right DACs Power-down Control

0: All DACs running, output is active

1: All DACs in power saving mode, output muted

010

DAC Control

[5:3]

IW[2:0]

000

Audio data format select.

LRP

Polarity select for LRCIN/DSP mode select.

0: normal LRCIN polarity/DSP late mode

1: inverted LRCIN polarity/DSP early mode

ATC

Attenuator Control.

0: All DACs use attenuations as programmed.

1: Right channel DACs use corresponding left DAC

attenuations

REV

Output phase reverse.

BCP

BCKIN Polarity

0 : normal BCKIN polarity

1: inverted BCKIN polarity

[7:6]

SF[1:0]

De-Emphasis sample rate select.

011

Interface

Control

IZD

Infinite zero detection circuit control and automute control

0: Infinite zero detect disabled

1: Infinite zero detect enabled

Table 8 Register Bit Descriptions

WM8706SEDS/R Datasheet(PDF) 17 Page - Wolfson Microelectronics plc

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