| Electronic Components Datasheet Search |
|
AD603 Datasheet(PDF) 16 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD603 Datasheet(HTML) 16 Page - Analog Devices |
|
16 / 20 page ![]() AD603 Rev. G | Page 16 of 20 VC 2.2 –0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 Figure 42. Gain Error for Cascaded Stages–Sequential Control PARALLEL MODE (SIMPLEST GAIN CONTROL INTERFACE) In this mode, the gain control of voltage is applied to both inputs in parallel—the GPOS pins of both A1 and A2 are connected to the control voltage and the GNEW inputs are grounded. The gain scaling is then doubled to 80 dB/V, requiring only a 1.00 V change for an 80 dB change of gain: Gain = (dB) = 80 VG + GO (4) where, as before, GO depends on the range selected; for example, in the maximum bandwidth mode, GO is +20 dB. Alternatively, the GNEG pins may be connected to an offset voltage of 0.500 V, in which case GO is −20 dB. The amplitude of the gain ripple in this case is also doubled, as shown in Figure 43, while the instantaneous signal-to-noise ratio at the output of A2 now decreases linearly as the gain increases, as shown in Figure 44. VC 2.2 –0.2 0 0.2 0.4 0.6 1.0 1.2 0.8 1.6 1.8 2.0 1.4 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 Figure 43. Gain Error for Cascaded Stages—Parallel Control VC 1.2 –0.2 0 0.2 0.4 0.6 0.8 1.0 90 80 85 75 65 70 55 60 50 Figure 44. ISNR for Cascaded Stages—Parallel Control LOW GAIN RIPPLE MODE (MINIMUM GAIN ERROR) As can be seen in Figure 42 and Figure 43, the error in the gain is periodic, that is, it shows a small ripple. (Note that there is also a variation in the output offset voltage, which is due to the gain interpolation, but this is not exact in amplitude.) By offsetting the gains of A1 and A2 by half the period of the ripple, that is, by 3 dB, the residual gain errors of the two amplifiers can be made to cancel. Figure 45 shows much lower gain ripple when configured in this manner. Figure 46 plots the ISNR as a function of gain; it is very similar to that in the parallel mode. VC 1.1 –0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 3.0 2.5 2.0 1.5 1.0 0.5 –0.5 –1.0 0 –1.5 –2.0 –2.5 –3.0 Figure 45. Gain Error for Cascaded Stages—Low Ripple Mode |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |