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ATMEGA325 Datasheet(PDF) 44 Page - ATMEL Corporation

Part # ATMEGA325
Description  8-bit Microcontroller with In-System Programmable Flash
PDF  353 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATMEGA325 Datasheet(HTML) 44 Page - ATMEL Corporation

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44
ATmega325/3250/645/6450
2570J–AVR–11/06
Internal Voltage
Reference
ATmega325/3250/645/6450 features an internal bandgap reference. This reference is
used for Brown-out Detection, and it can be used as an input to the Analog Comparator
or the ADC.
Voltage Reference Enable
Signals and Start-up Time
The voltage reference has a start-up time that may influence the way it should be used.
The start-up time is given in Table 19. To save power, the reference is not always turned
on. The reference is on during the following situations:
1.
When the BOD is enabled (by programming the BODLEVEL [1..0] Fuse).
2.
When the bandgap reference is connected to the Analog Comparator (by setting
the ACBG bit in ACSR).
3.
When the ADC is enabled.
Thus, when the BOD is not enabled, after setting the ACBG bit or enabling the ADC, the
user must always allow the reference to start up before the output from the Analog Com-
parator or ADC is used. To reduce power consumption in Power-down mode, the user
can avoid the three conditions above to ensure that the reference is turned off before
entering Power-down mode.
Note:
1. Values are guidelines only. Actual values are TBD.
Watchdog Timer
The Watchdog Timer is clocked from a separate On-chip Oscillator which runs at
1 MHz. This is the typical value at V
CC = 5V. See characterization data for typical values
at other V
CC levels. By controlling the Watchdog Timer prescaler, the Watchdog Reset
interval can be adjusted as shown in Table 21 on page 46. The WDR – Watchdog Reset
– instruction resets the Watchdog Timer. The Watchdog Timer is also reset when it is
disabled and when a Chip Reset occurs. Eight different clock cycle periods can be
selected to determine the reset period. If the reset period expires without another
Watchdog Reset, the ATmega325/3250/645/6450 resets and executes from the Reset
Vector. For timing details on the Watchdog Reset, refer to Table 21 on page 46.
To prevent unintentional disabling of the Watchdog or unintentional change of time-out
period, two different safety levels are selected by the fuse WDTON as shown in Table
20. Refer to “Timed Sequences for Changing the Configuration of the Watchdog Timer”
on page 47 for details.
Table 19. Internal Voltage Reference Characteristics
(1)
Symbol
Parameter
Condition
Min
Typ
Max
Units
VBG
Bandgap reference voltage
V
CC = 2.7V,
TA = 25°C
1.0
1.1
1.2
V
tBG
Bandgap reference start-up time
VCC = 2.7V,
T
A = 25°C
40
70
µs
IBG
Bandgap reference current
consumption
VCC = 2.7V,
TA = 25°C
15
µA
Table 20. WDT Configuration as a Function of the Fuse Settings of WDTON
WDTON
Safety
Level
WDT Initial
State
How to Disable the
WDT
How to Change
Time-out
Unprogrammed
1
Disabled
Timed sequence
Timed sequence
Programmed
2
Enabled
Always enabled
Timed sequence



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