AT43USB326 datasheet(69/102 Pages) ATMEL

69 / 102 page

AT43USB326

3313D–USB–04/06

Set and cleared by the hardware as controlled through Port Control register.

• Bit 0 – PCSTAT: Port Connect Status

0 = No device on this port

1 = Device present on this port

Set to 1 for Port 1. Set and cleared by the hardware after sampling of connect status at EOF2.

Overcurrent Detect Register – UOVCER

• Bit 7..3 – Reserved

These bits are reserved in the AT43USB326 and will read as zero.

•Bit 2 – PORT 2

Setting this bit enables the hub to detect an overcurrent on Port 2 while the hub is in the sus-

pend state.

• Bit 1, 0 – Reserved

These bits are reserved in the AT43USB326 and will read as zero.

Hub Port State Register – HPSTAT2, 3

These registers contain the state of the ports’ DP and DM pins, which will be sent to the host

upon receipt of a GetBusState request.

• Bit 7..2 – Reserved

These bits are reserved in the AT43USB326 and will read as zero.

•Bit 1 – DPSTATE: DPlus State

Value of DP at last EOF. Set and cleared by hardware at EOF2.

Set to 1 for Port 1.

•Bit 0 – DMSTATE: DMinus State

Value of DM at last EOF. Set and cleared by hardware at EOF2.

Set to 0 for Port 1.

Bit

$1FF2

–

PORT2

–

UOVCER

Read/Write

R/W

Initial Value

Bit

Port2 $1FA9

–

DPSTATE

DMSTATE

PSTATE2

Port3 $1FAA

–

DPSTATE

DMSTATE

PSTATE3

Read/Write

Initial Value

AT43USB326 Datasheet(PDF) 69 Page - ATMEL Corporation

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