 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
EFM32 Datasheet(PDF) 45 Page - Silicon Laboratories |
|
|
|||||||||||||||||||||||||||||
EFM32 Datasheet(HTML) 45 Page - Silicon Laboratories |
|
|
45 / 261 page  Parameter Symbol Test Condition Min Typ Max Unit Frequency limits fHFRCO_BAND FREQRANGE = 0, FINETUNIN- GEN = 0 1 — 10 MHz FREQRANGE = 3, FINETUNIN- GEN = 0 2 — 17 MHz FREQRANGE = 6, FINETUNIN- GEN = 0 4 — 30 MHz FREQRANGE = 7, FINETUNIN- GEN = 0 5 — 34 MHz FREQRANGE = 8, FINETUNIN- GEN = 0 7 — 42 MHz FREQRANGE = 10, FINETUNIN- GEN = 0 12 — 58 MHz FREQRANGE = 11, FINETUNIN- GEN = 0 15 — 68 MHz FREQRANGE = 12, FINETUNIN- GEN = 0 18 — 83 MHz FREQRANGE = 13, FINETUNIN- GEN = 0 24 — 100 MHz FREQRANGE = 14, FINETUNIN- GEN = 0 28 — 119 MHz FREQRANGE = 15, FINETUNIN- GEN = 0 33 — 138 MHz FREQRANGE = 16, FINETUNIN- GEN = 0 43 — 163 MHz Note: 1. Maximum DPLL lock time ~= 6 x (M+1) x tREF, where tREF is the reference clock period. EFM32GG11 Family Data Sheet Electrical Specifications silabs.com | Building a more connected world. Rev. 1.2 | 45 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
