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AFE78201 Datasheet(PDF) 3 Page - Texas Instruments |
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AFE78201 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 95 page  5 Pin Configuration and Functions 1 GPIO3/ UARTIN 1 GPIO3/ UARTIN 18 VOUT 18 VOUT 2 GPIO2/ UARTOUT 2 GPIO2/ UARTOUT 17 PVDD 17 PVDD 3 GPIO1 3 GPIO1 16 POL_SEL/ AIN1 16 POL_SEL/ AIN1 4 SCLR 4 SCLR 15 AIN0 15 AIN0 5 REF_EN 5 REF_EN 14 GND 14 GND 6 RESET 6 RESET 13 VDD 13 VDD Not to scale Not to scale 1 GPIO3/ UARTIN 18 VOUT 2 GPIO2/ UARTOUT 17 PVDD 3 GPIO1 16 POL_SEL/ AIN1 4 SCLR 15 AIN0 5 REF_EN 14 GND 6 RESET 13 VDD Not to scale Figure 5-1. RRU Package, 24-pin UQFN (Top View) Table 5-1. Pin Functions PIN TYPE(1) DESCRIPTION NAME NO. AIN0 15 AI ADC input voltage. The input range is 0 V to 2 × VREF. ALARM 24 DO Alarm notification pin, open drain, active low. When alarm condition is asserted, this pin is held to logic low; otherwise, this pin is in a high-impedance state (Hi-Z). GND 14 P Digital and analog ground. Ground reference point for all circuitry on the device. GND 21 P Digital and analog ground. GND 22 P Digital and analog ground. GPIO0/ CLK_OUT 11 DO/DI General-purpose input/output (GPIO) pin. Can be configured as a clock output for the 1.2288-MHz internal clock or as a timer. In Hi-Z if not driven. If a GPIO pin is not driven, an external pullup or pulldown resistor is required. GPIO1 3 DO/DI General-purpose input/output (GPIO) pin. In Hi-Z if not driven. If a GPIO pin is not driven, an external pullup or pulldown resistor is required. GPIO2/ UARTOUT 2 DO/DI General-purpose input/output (GPIO) pin. Configured as UART data output at power up. This pin can be configured to function as IRQ pin in SPI only mode. In Hi-Z if not driven. If a GPIO pin is not driven, an external pullup or pulldown resistor is required. GPIO3/ UARTIN 1 DI/DO General-purpose input/output (GPIO) pin. Configured as UART data input at power up. Connect to IOVDD or logic high if not used. If a GPIO pin is not driven, an external pullup or pulldown resistor is required. GPIO4/ SDO 9 DO/DI General-purpose input/output (GPIO) pin. Can be configured as an SPI data output in SPI mode. Data are output on the rising edge of SCLK when CS is low. Interrupt request (IRQ) pin in the UART break mode (UBM). The output is in Hi-Z at power up and must be enabled in the CONFIG register. If a GPIO pin is not driven, an external pullup or pulldown resistor is required. GPIO5/ SDI 8 DI/DO General-purpose input/output (GPIO) pin. Configured as an SPI data input at power up. Data are clocked into the 24-bit input shift register on the falling edge of the serial clock input. SDI is a Schmitt-Trigger logic input. If a GPIO pin is not driven, an external pullup or pulldown resistor is required. www.ti.com AFE78201, AFE88201 SLASF44 – MAY 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: AFE78201 AFE88201 |
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