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80C86 Datasheet(PDF) 21 Page - Intersil Corporation

Part # 80C86
Description  CMOS 16-Bit Microprocessor
PDF  37 Pages
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

80C86 Datasheet(HTML) 21 Page - Intersil Corporation

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161
AC Electrical Specifications
VCC = 5.0V ±10%
TA = 0
oC to +70oC (C80C86, C80C86-2)
VCC = 5.0V ±10%; TA = -40
oC to +85oC (I80C86, I80C86-2)
VCC = 5.0V ±10%; TA = -55
oC to +125oC (M80C86)
VCC = 5.0V ±5%;
TA = -55
oC to +125oC (M80C86-2)
MAX MODE SYSTEM (USING 82C88 BUS CONTROLLER)
TIMING REQUIREMENTS
80C86
80C86-2
UNITS
TEST CONDITIONS
SYMBOL
PARAMETER
MIN
MAX
MIN
MAX
(1)
TCLCL
CLK Cycle Period
200
125
ns
(2)
TCLCH
CLK Low Time
118
68
ns
(3)
TCHCL
CLK High Time
69
44
ns
(4)
TCH1CH2
CLK Rise Time
10
10
ns
From 1.0V to 3.5V
(5)
TCL2CL1
CLK Fall Time
10
10
ns
From 3.5V to 1.0V
(6)
TDVCL
Data in Setup Time
30
20
ns
(7)
TCLDX1
Data In Hold Time
10
10
ns
(8)
TR1VCL
RDY Setup Time into 82C84A
(Notes 10, 11)
35
35
ns
(9)
TCLR1X
RDY Hold Time into 82C84A
(Notes 10, 11)
00
ns
(10)
TRYHCH
READY Setup Time into 80C86
118
68
ns
(11)
TCHRYX
READY Hold Time into 80C86
30
20
ns
(12)
TRYLCL
READY Inactive to CLK (Note 12)
-8
-8
ns
(13)
TlNVCH
Setup Time for Recognition (lNTR,
NMl, TEST) (Note 11)
30
15
ns
(14)
TGVCH
RQ/GT Setup Time
30
15
ns
(15)
TCHGX
RQ Hold Time into 80C86 (Note 13)
40
TCHCL+
10
30
TCHCL+
10
ns
(16)
TILlH
Input Rise Time (Except CLK)
15
15
ns
From 0.8V to 2.0V
(17)
TIHIL
Input Fall Time (Except CLK)
15
15
ns
From 2.0V to 0.8V
TIMING RESPONSES
(18)
TCLML
Command Active Delay (Note 10)
5
35
5
35
ns
CL = 100pF for All
80C86
Outputs
(In
Addition
to
80C86
Self Load)
(19)
TCLMH
Command Inactive (Note 10)
5
35
5
35
ns
CL = 100pF for All
80C86
Outputs
(In
Addition
to
80C86
Self Load)
(20)
TRYHSH
READY Active to Status Passive
(Notes 12, 14)
110
65
ns
CL = 100pF for All
80C86
Outputs
(In
Addition
to
80C86
Self Load)
(21)
TCHSV
Status Active Delay
10
110
10
60
ns
CL = 100pF for All
80C86
Outputs
(In
Addition
to
80C86
Self Load)
(22)
TCLSH
Status Inactive Delay (Note 14)
10
130
10
70
ns
CL = 100pF for All
80C86
Outputs
(In
Addition
to
80C86
Self Load)
80C86



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