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LAN91C96-MS Datasheet(PDF) 19 Page - SMSC Corporation |
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LAN91C96-MS Datasheet(HTML) 19 Page - SMSC Corporation |
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19 / 125 page ![]() Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet SMSC LAN91C965v&3v Page 19 Rev. 03-28-07 DATASHEET PIN NO. TQFP QFP PIN NAME TYPE DESCRIPTION 91 93 nEN16 I with pullup ** Input. When low the LAN91C96 is configured for 16 bit bus operation. If left open the LAN91C96 works in 8 bit bus mode. 16 bit configuration can also be programmed via serial EEPROM or software initialization of the CONFIGURATION REGISTER. 94 96 XTAL1 Iclk ** An external parallel resonance 20MHz crystal should be connected across these pins. If an external clock source is used, it should be connected to this pin (XTAL1) and XTAL2 should be left open. 95 97 XTAL2 Iclk An external parallel resonance 20MHz crystal should be connected across these pins. If an external clock source is used, it should be connected to XTAL1 and this pin (XTAL2) should be left open. 83 82 85 84 RECP/ RECN Diff. Input ** AUI receive differential inputs. 77 76 79 78 TXP/nCOLL TXN/nCRS Diff. Output INTERNAL ENDEC - (nXENDEC pin open). In this mode TXP and TXN are the AUI transmit differential outputs. They must be externally pulled up using 150 ohm resistors. I ** EXTERNAL ENDEC - (nXENDEC pin tied low). In this mode the pins are inputs used for collision and carrier sense functions. 81 80 83 82 COLP COLN Diff. Input ** AUI collision differential inputs. A collision is indicated by a 10MHz signal at this input pair. 85 84 87 86 TPERXP TPERXN Diff. Input ** 10BASE-T receive differential inputs. 75 73 77 75 TPETXP TPETXN Diff. Output INTERNAL ENDEC - 10BASE-T transmit differential outputs. 72 74 74 76 TPETXDP TPETXDN Diff. Output 10BASE-T delayed transmit differential outputs. Used in combination with TPETXP and TPETXN to generate the 10BASE-T transmit pre-distortion. 66 68 PWRDWN/ TXCLK I with pullup ** INTERNAL ENDEC - Powerdown input. It keeps the LAN91C96 in powerdown mode when high (open). Must be low for normal operation. EXTERNAL ENDEC - Transmit clock input from external ENDEC. 88 90 RBIAS Analog Input A resistor should be connected between this pin and analog ground to determine the receive threshold voltage of TX Receive, AUI Receive, AUI Collision Receive, and AUI transmit voltage. 90 92 nXENDEC I with pullup ** When tied low the LAN91C96 is configured for EXTERNAL ENDEC. When tied high or left open the LAN91C96 will use its internal encoder/decoder. 11,19, 48,59, 98,38 13,21,40, 50, 61,100 VDD +5V power supply pins or 3.3V power supply pins (Revisions E and later) 71,79, 89 73,81, 91 AVDD +5V analog power supply pins or 3.3V power supply pins (Revisions E and later) |
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