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LM75BDP Datasheet(PDF) 5 Page - Guangdong Youtai Semiconductor Co., Ltd.

Part # LM75BDP
Description  plastic thin shrink small outline package; 8 leads;
PDF  23 Pages
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Manufacturer  UMW [Guangdong Youtai Semiconductor Co., Ltd.]
Direct Link  https://www.umw-ic.com/
Logo UMW - Guangdong Youtai Semiconductor Co., Ltd.

LM75BDP Datasheet(HTML) 5 Page - Guangdong Youtai Semiconductor Co., Ltd.

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In OS comparator mode, the OS output behaves like a thermostat. It becomes active
when the Temp exceeds the Tth(ots), and is reset when the Temp drops below the Thys.
Reading the device registers or putting the device into shutdown does not change the
state of the OS output. The OS output in this case can be used to control cooling fans or
thermal switches.
 
In OS interrupt mode, the OS output is used for thermal interruption. When the device is
powered-up, the OS output is first activated only when the Temp exceeds the Tth(ots); then
it remains active indefinitely until being reset by a read of any register. Once the OS output
has been activated by crossing Tth(ots) and then reset, it can be activated again only when
the Temp drops below the Thys; then again, it remains active indefinitely until being reset
by a read of any register. The OS interrupt operation would be continued in this sequence:
Tth(ots) trip, Reset, Thys trip, Reset, Tth(ots) trip, Reset, Thys trip, Reset, etc. Putting the
device into the shutdown mode by setting the bit 0 of the configuration register also resets
the OS output.
 
In both cases, comparator mode and interrupt mode, the OS output is activated only if a
number of consecutive faults, defined by the device fault queue, has been met. The fault
queue is programmable and stored in the two bits, B3 and B4, of the Configuration
register. Also, the OS output active state is selectable as HIGH or LOW by setting
accordingly the configuration register bit B2.
 
At power-up, the device is put into normal operation mode, the Tth(ots) is set to 80 C, the
Thys is set to 75 C, the OS active state is selected LOW and the fault queue is equal to 1.
The temp reading data is not available until the first conversion is completed in about
100 ms.
 
The OS response to the temperature is illustrated in Figure 6.
 
 
 
 
Tth(ots)
 
 
 
Thys
 
 
 
 
OS reset
 
OS active
 
 
 
 
OS reset
reading temperature limits
 
 
 
 
OS output in comparator mode
 
 
 
(1)
(1)
(1)
 
OS active
 
 
OS output in interrupt mode
 
 
 
002aae334
 
(1) OS is reset by either reading register or putting the device in shutdown mode. It is assumed that
the fault queue is met at each Tth(ots) and Thys crossing point.
Fig 6.
OS response to temperature
 
www.umw-ic.com
5
友台半导体有限公司
 
 
UMW
LM75B



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