Application Notes

VS– supplies should be bypassed to ground with separate 0.1μF ceramic capacitors. A bulk

capacitor (i.e. 2.2 μF or larger tantalum capacitor) within 100mm to provide large, slow

currents and better performance. This bulk capacitor can be shared with other analog parts.

Good PC board layout techniques optimize performance by decreasing the amount of stray

capacitance at the op-amp’s inputs and output. To decrease stray capacitance, minimize trace

lengths and widths by placing external components as close to the device as possible. Use

surface-mount components whenever possible. For the op-amp, soldering the part to the board

directly is strongly recommended. Try to keep the high frequency big current loop area small

to minimize the EMI (electromagnetic interfacing).

Grounding

A ground plane layer is important for the LMV72xA circuit design. The length of the

current path speed currents in an inductive ground return will create an unwanted voltage

noise. Broad ground plane areas will reduce the parasitic inductance.

Input To Output Coupling

To minimize capacitive coupling, the input and output signal traces should not be parallel.

This helps reduce unwanted positive feedback.

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LMV721, LMV722, LMV724

10MHz, RRIO CMOS Operational Amplifiers

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