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L640DU21NF Datasheet(PDF) 14 Page - Advanced Micro Devices |
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L640DU21NF Datasheet(HTML) 14 Page - Advanced Micro Devices |
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14 / 57 page ![]() 12 Am29LV640D/Am29LV641D 22366C6 January 22, 2007 D A TA SH EET The RESET# pin can be tied to the system reset cir- cuitry. A system reset would thus also reset the Flash memory, enabling the system to read the boot-up firm- ware from the Flash memory. If RESET# is asserted during a program or erase op- eration, the RY/BY# pin remains a “0” (busy) until the internal reset operation is complete, which requires a time of t READY (during Embedded Algorithms). The sys- tem can thus monitor RY/BY# to determine whether the reset operation is complete. If RESET# is asserted when a program or erase operation is not executing (RY/BY# pin is “1”), the reset operation is completed within a time of t READY (not during Embedded Algo- rithms). The system can read data t RH after the RE- SET# pin returns to V IH. Refer to the table “AC Characteristics” on page 37 for RESET# parameters and to Figure 14, on page 38 for the timing diagram. Output Disable Mode When the OE# input is at V IH, output from the device is disabled. The output pins are placed in the high impedance state. Table 2. Sector Address Table (Sheet 1 of 4) Sector A21 A20 A19 A18 A17 A16 A15 16-bit Address Range (in hexadecimal) SA0 0 0 0 0 0 0 0 000000–007FFF SA1 0 0 0 0 0 0 1 008000–00FFFF SA2 0 0 0 0 0 1 0 010000–017FFF SA3 0 0 0 0 0 1 1 018000–01FFFF SA4 0 0 0 0 1 0 0 020000–027FFF SA5 0 0 0 0 1 0 1 028000–02FFFF SA6 0 0 0 0 1 1 0 030000–037FFF SA7 0 0 0 0 1 1 1 038000–03FFFF SA8 0 0 0 1 0 0 0 040000–047FFF SA9 0 0 0 1 0 0 1 048000–04FFFF SA10 0 0 0 1 0 1 0 050000–057FFF SA11 0 0 0 1 0 1 1 058000–05FFFF SA12 0 0 0 1 1 0 0 060000–067FFF SA13 0 0 0 1 1 0 1 068000–06FFFF SA14 0 0 0 1 1 1 0 070000–077FFF SA15 0 0 0 1 1 1 1 078000–07FFFF SA16 0 0 1 0 0 0 0 080000–087FFF SA17 0 0 1 0 0 0 1 088000–08FFFF SA18 0 0 1 0 0 1 0 090000–097FFF SA19 0 0 1 0 0 1 1 098000–09FFFF SA20 0 0 1 0 1 0 0 0A0000–0A7FFF SA21 0 0 1 0 1 0 1 0A8000–0AFFFF SA22 0 0 1 0 1 1 0 0B0000–0B7FFF SA23 0 0 1 0 1 1 1 0B8000–0BFFFF SA24 001 10 00 0C0000–0C7FFF SA25 0 0 1 1 0 0 1 0C8000–0CFFFF |
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