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LTM4607 Datasheet(PDF) 10 Page - Analog Devices |
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LTM4607 Datasheet(HTML) 10 Page - Analog Devices |
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10 / 26 page ![]() LTM4712 10 Rev. 0 For more information www.analog.com The typical LTM4712 application circuit is shown on the front page. External component selection is primarily determined by the input voltage, the output voltage, and the maximum load current. Output Voltage Programming The PWM controller has an internal 1V reference voltage. A 100k internal feedback resistor connects VOUT and FB pins together. Adding a resistor RFB from the FB pin to GND programs the output voltage (see Equation 1). RFB (kΩ) = 100 VOUT 1 (1) Table 1. VFB Resistor Table vs Various Output Voltages VOUT (V) 3.3 5 8 12 16 20 24 28 RFB (k) 43.5 25 14.3 9.09 6.67 5.23 4.35 3.74 For parallel operation of N-channels LTM4712, Equation 2 can be used to solve for RFB. RFB (kΩ) = 100 N • VOUT 1 (2) Operating Frequency Selection and Phase-Locked Loop (FREQ, SYNC, PHMODE and CLKOUT Pins) The switching frequency of the LTM4712 can be selected using the FREQ pin. If the SYNC pin is not being driven by an external clock source, the FREQ pin is used to pro- gram the controller’s operating frequency from 100kHz to 600kHz. Switching frequency is determined by the voltage on the FREQ pin. Since there is a precision 10μA current flowing out of the FREQ pin, program the controller’s switching frequency with a single resistor to SGND (e.g., the FREQ pin voltage is 1.58V with 158k resistor from the FREQ pin to SGND). Table 2 provides a list of RT resistor values and their resultant frequencies. APPLICATIONS INFORMATION Table 2. Switching Frequency vs RT Value FREQUENCY (kHz) RT VALUE (kΩ) 100 58 200 80 300 120 400 140 500 170 600 200 A phase-locked loop (PLL) is integrated to synchronize the internal oscillator to an external clock source driving the SYNC pin. The PLL is capable of locking to any frequency within the range of 100kHz to 600kHz. The frequency set- ting resistor at FREQ pin should always be present to set the controller’s initial switching frequency before locking to the external clock or in any cases the external clock is missing during the operation. The CLKOUT pin is a clock signal output with the same frequency as the internal oscillator with phase shift programmed by the PHMODE pin. It can be used in multi-IC parallel applications by passing the clock signal of the first IC to the SYNC pin of the second IC for frequency synchronization. The phase shift can be programmed based on Table 3. Table 3. PHMODE Setting vs CLKOUT Phase Shift PHMODE PIN CLKOUT PHASE SHIFT REFERS TO THE INTERNAL OSCILLATOR SGND 180° FLOAT 120° INTVCC 90° Input Decoupling Capacitors In boost mode, since the input current is continuous, only minimum input capacitors are required. However, the input current is discontinuous in buck mode. So the selection of input capacitor CIN is driven by the need of filtering the input square wave current. |
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