LTM4607 datasheet(12/26 Pages) AD

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LTM4712

Rev. 0

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APPLICATIONS INFORMATION

ISET pin if the ISET pin is float or ISET pin voltage higher

than 1.2V, the current limit is clamped at 50mV internally.

The input current limit function prevents overloading the

DC input source, while the output current limit provides

a building block for battery charger or LED driver applica-

tions. It can also serve as an extra current limit protection

for a constant-voltage regulation application. The input/

output current limit function has an operating voltage

range of GND to the absolute maximum VOUT/VIN (36V).

Output Current Monitor (IMON)

The IMON pin produces a voltage proportional to the volt-

age of ISP–ISN. When VISP – VISN = 0mV, IMON is 0.2V.

When VISP–VISN = 50mV, IMON is 1.2V.

Soft-Start Function

When a capacitor is connected to the SS pin, a soft-start

current of 2.5μA starts to charge the capacitor. A soft-

start function is achieved by controlling the output ramp

voltage according to the ramp rate on the SS pin. Current

foldback is disabled during this phase to ensure smooth

soft-start. When the chip is in the shutdown state with its

RUN pin voltage below 1.22V, the SS pin is actively pulled

to ground. The soft-start range is defined to be the voltage

range from 0V to 1.0V on the SS pin. The total soft-start

time can be calculated with Equation 6.

tSOFTSTART = 1.0 •

CSS

2.5µA

(6)

Regardless of the mode selected by the MODE pin, the

regulator always starts in pulse-skipping mode up to SS

= 1.0V.

Run Enable

The RUN pin is used to enable the power module. The

pin can be driven with a logic input, not to exceed 12V.

The RUN pin can also be used as an undervoltage lock-

out (UVLO) function by connecting a resistor from the

input supply to the RUN pin. Increasing the RUN pin volt-

age above 1.22V turns on the entire chip.

Stability Compensation

The LTM4712 has already been internally optimized and

compensated for all output voltages and capacitor com-

binations including all ceramic capacitor applications

when COMPb is tied to COMPa. For specific optimized

requirement, disconnect COMPb from COMPa and apply a

Type II C-R-C compensation network from COMPa to GND

to achieve external compensation. The LTpowerCAD®

design tool is available to download on-line to perform

specific control loop optimization and analyze the control

stability and load transient performance.

Fault Conditions: Current Limit and Current Foldback

The maximum inductor current is inherently limited in a

peak current mode controller with a 20A maximum cur-

rent limit.

To promote limit current in the event of a short-circuit to

ground, the LTM4712 includes foldback current limiting.

If the output falls by more than 40%, then the maximum

current is progressively lowered to about 4A.

Parallel Operations

For output loads that demand high current, multiple

LTM4712s can be paralleled with interleaving to provide

more output current without increasing input and output

voltage ripple. The SYNC pin allows the LTM4712 to syn-

chronize to the CLKOUT signal of another LTM4712. The

CLKOUT signal can be connected to the SYNC pin of the

following LTM4712 stage to line up both the frequency

and the phase of the entire system. Tying the PHMODE

pin to GND, floating or INTVCC generates a phase differ-

ence (between SW1 and CLKOUT) of 180°, 120° or 90°,

respectively for 2, 3, or 4 ICs parallel operations.

When designing multiple ICs parallel operations, always

start from the single LTM4712 design and check the out-

put current capability and load current transient stability.

Then the LTM4712s can be paralleled by making the fol-

lowing connections:

• Tie all VFB pins together

• Tie all COMP pins together (assuming COMPa short to

COMPb for initial debug)

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