LTM4607 datasheet(17/26 Pages) AD

17 / 26 page

LTM4712

Rev. 0

For more information www.analog.com

PCB Layout

The high integration of LTM4712 makes the PCB layout

very simple and easy. However, to optimize its electrical

and thermal performance, the following layout consider-

ations are still necessary:

• Use large PCB copper areas for high current path,

including VIN, GND, and VOUT. It helps to minimize the

PCB conduction loss and thermal stress.

• Place high-frequency input and output ceramic capac-

itors next to the VIN, GND, and VOUT pins to minimize

high frequency noise.

APPLICATIONS INFORMATION

Figure 19. 24VIN to 36VOUT,

400kHz, Derating Curve,

No Heat Sink

Figure 20. 12VIN to 36VOUT, 400kHz,

Derating Curve,

No Heat Sink

Figure 21. 5VIN to 36VOUT,

400kHz, Derating Curve,

No Heat Sink

0LFM

200LFM

400LFM

AMBIENT TEMPERATURE (°C)

105

125

4712 F19

0LFM

200LFM

400LFM

AMBIENT TEMPERATURE (°C)

105

125

4712 F20

0LFM

200LFM

400LFM

AMBIENT TEMPERATURE (°C)

105

125

4712 F21

• Place a dedicated power ground layer underneath

the unit.

• To minimize the via conduction loss and reduce module

thermal stress, use multiple vias for interconnection

between the top layer and other power layers.

• Do not put vias directly on pads, unless the vias

are capped.

• Use a separated SGND ground copper area for compo-

nents connected to the signal pins. Connect the SGND

to PGND underneath the unit.

Figure 22 gives a good example of the recommended

PCB layout.

GND

VIN

GND

(a) LTM4712 Top Layer

4712 F22a

C26

C19

C20

VOUT

GND

VIN

GND

(b) LTM4712 Bottom Layer

4712 F22b

C21

C31

C33

C19

VOUT

GND

C28

C29

C30

C37

C15

C27

Figure 22. Recommended PCB Layout

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