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P83CL580 Datasheet(PDF) 34 Page - NXP Semiconductors

Part # P83CL580
Description  Low voltage 8-bit microcontrollers with UART, I2C-bus and ADC
PDF  80 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

P83CL580 Datasheet(HTML) 34 Page - NXP Semiconductors

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1997 Mar 14
34
Philips Semiconductors
Product specification
Low voltage 8-bit microcontrollers with
UART, I2C-bus and ADC
P80CL580; P83CL580
16.2
Serial Port Control and Status Register (S0CON)
The Serial Port Control and Status Register is the Special Function Register S0CON. The register contains not only the
mode selection bits, but also the 9th data bit for transmit and receive (TB8 and RB8), and the serial port interrupt bits
(TI and RI).
Table 30 Serial Port Control Register (address 98H)
Table 31 Description of S0CON bits
Table 32 Selection of the serial port modes
76543210
SMO
SM1
SM2
REN
TB8
RB8
TI
RI
BIT
SYMBOL
DESCRIPTION
7
SM0
These bits are used to select the serial port mode; see Table 32.
6
SM1
5
SM2
Enables the multiprocessor communication feature in Modes 2 and 3. In these modes,
if SM2 = 1, then RI will not be activated if the received 9th data bit (RB8) is a logic 0.
In Mode 1, if SM2 = 1, then RI will not be activated unless a valid stop bit was received.
In Mode 0, SM2 should be a logic 0.
4
REN
Enables serial reception and is set by software to enable reception, and cleared by
software to disable reception.
3
TB8
Is the 9th data bit that will be transmitted in Modes 2 and 3. Set or cleared by software as
desired.
2
RB8
In Modes 2 and 3, is the 9th data bit received. In Mode 1, if SM2 = 0 then RB8 is the stop
bit that was received. In Mode 0, RB8 is not used.
1TI
The transmit interrupt flag. Set by hardware at the end of the 8th bit time in Mode 0, or
at the beginning of the stop bit time in the other modes, in any serial transmission. Must
be cleared by software.
0RI
The receive interrupt flag. Set by hardware at the end of the 8th bit time in Mode 0, or
halfway through the stop bit time in the other modes, in any serial transmission (except
see SM2). Must be cleared by software.
SMO
SM1
MODE
DESCRIPTION
BAUD RATE
0
0
Mode 0
Shift register
1
⁄12 × fosc
0
1
Mode 1
8-bit UART
variable
1
0
Mode 2
9-bit UART
1
⁄32 or 1⁄64 × fosc
1
1
Mode 3
9-bit UART
variable



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