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TMS320C6421 Datasheet(PDF) 121 Page - Texas Instruments

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Part # TMS320C6421
Description  Fixed-Point Digital Signal Processor
PDF  227 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS320C6421 Datasheet(HTML) 121 Page - Texas Instruments

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DSP Subsystem
SYSCLK1
SYSCLK3
SCR
EDMA
DDR2 PHY
DDR2 VTP
DDR2 Mem Ctlr
PLLDIV1 (/2)
BPDIV
PLL Controller 2
PLL Controller 1
PLLDIV2 (/3)
PLLDIV3 (/6)
PLLDIV1 (/1)
SYSCLK2
UART0
I2C
Timers (x3)
PWMs (x3)
EMAC
EMIFA
VLYNQ
HPI
McASP0
McBSP0
GPIO
MXI/CLKIN
(15−30 MHz)
OSCDIV1 (/1)
OBSCLK
(CLKOUT0 Pin)
AUXCLK
TMS320C6421
Fixed-Point Digital Signal Processor
SPRS346B – JANUARY 2007 – REVISED APRIL 2007
The CLKDIV1:CLKDIV3:CLKDIV6 ratio must be strictly followed by programming the PLL Controller 1
(PLLC1) PLLDIV1, PLLDIV2, and PLLDIV3 registers appropriately (see Table 6-3).
Table 6-3. PLLC1 Programming for CLKDIV1, CLKDIV3, CLKDIV6 Domains
CLKDIV1 DOMAIN
CLKDIV3 DOMAIN
CLKDIV6 DOMAIN
(SYSCLK1)
(SYSCLK2)
(SYSCLK3)
PLL1
PLL1
PLL1
PLLDIV1.RATIO
PLLDIV2.RATIO
PLLDIV3.RATIO
Divide-Down
Divide-Down
Divide-Down
DIV1
/1
0
/3
2
/6
5
DIV2
/2
1
/6
5
/12
11
DIV3
/3
2
/9
8
/18
17
Figure 6-4. PLL1 and PLL2 Clock Domain Block Diagram
For further detail on PLL1 and PLL2, see the structure block diagrams Figure 6-5 and Figure 6-6,
respectively.
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Peripheral Information and Electrical Specifications
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