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TMS320C6421 Datasheet(PDF) 176 Page - Texas Instruments |
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TMS320C6421 Datasheet(HTML) 176 Page - Texas Instruments |
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176 / 227 page ![]() www.ti.com HCS HAS HCNTL[1:0] HR/W HHWIL HSTROBE (A)(C) HD[15:0] (output) HRDY (B) 1 2 1 2 1 2 5 6 3 4 3 1 2 1 2 1 2 8 14 15 14 8 7 1stHalf-Word 2ndHalf-Word 6 13 15 A. referstothefollowinglogicaloperationon , ,and :[NOT( XOR )]OR . HSTROBE HCSHDS1 HDS2 HDS1 HDS2 HCS B. Dependingonthetypeofwriteorreadoperation(HPIDwithoutauto-incrementing;HPIA,HPIC,orHPIDwithauto- incrementing)andthestateoftheFIFO,transitionson mayormaynotoccur. FormoredetailedinformationontheHPIperipheral,seethe User’sGuide (literaturenumberSPRUEM9). C. reflectstypical behaviorwhen assertioniscausedby or . timingrequirementsare reflectedbyparametersfor . HRDY HCS HCS HSTROBE HDS1 HDS2HCS HSTROBE TMS320C642xHostPortInterface(HPI) TMS320C6421 Fixed-Point Digital Signal Processor SPRS346B – JANUARY 2007 – REVISED APRIL 2007 Table 6-36. Switching Characteristics for Host-Port Interface Cycles (see Figure 6-23 through Figure 6-26) (continued) -400 -500 NO. PARAMETER UNIT -600 MIN MAX Applies to HAS used. The conditions under which HRDY goes high (not Delay time, HAS low to HRDY 19 td(HASL-HRDYV) ready) or stays low (ready) for HPI 12 ns valid Write or HPI Read is the same as parameter #5. Figure 6-23. HPI16 Read Timing (HAS Not Used, Tied High) Peripheral Information and Electrical Specifications 176 Submit Documentation Feedback |
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