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TMS320C6421 Datasheet(PDF) 183 Page - Texas Instruments |
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TMS320C6421 Datasheet(HTML) 183 Page - Texas Instruments |
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183 / 227 page ![]() www.ti.com Bit(n-1) (n-2) (n-3) Bit 0 Bit(n-1) (n-2) (n-3) 14 12 11 10 9 3 3 2 8 7 6 5 4 4 3 1 3 2 CLKS CLKR FSR (int) FSR (ext) DR CLKX FSX (int) FSX (ext) FSX (XDATDLY=00b) DX 13(A) 13(A) 2 1 CLKS FSR external CLKR/X (no need to resync) CLKR/X (needs resync) TMS320C6421 Fixed-Point Digital Signal Processor SPRS346B – JANUARY 2007 – REVISED APRIL 2007 A. Parameter No. 13 applies to the first data bit only when XDATDLY ≠ 0. Figure 6-27. McBSP Timing(B) Table 6-40. Timing Requirements for FSR When GSYNC = 1 (see Figure 6-28) -400 -500 NO. UNIT -600 MIN MAX 1 tsu(FRH-CKSH) Setup time, FSR high before CLKS high 4 ns 2 th(CKSH-FRH) Hold time, FSR high after CLKS high 4 ns Figure 6-28. FSR Timing When GSYNC = 1 Submit Documentation Feedback Peripheral Information and Electrical Specifications 183 |
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