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6.20.2

GPIO Peripheral Input/Output Electrical Data/Timing

GP[x]

Input

GP[x]

Output

TMS320C6421

Fixed-Point Digital Signal Processor

SPRS346B – JANUARY 2007 – REVISED APRIL 2007

Table 6-83. Timing Requirements for GPIO Inputs

(1) (see Figure 6-49)

-400

-500

NO.

UNIT

-600

MIN

MAX

tw(GPIH)

Pulse duration, GP[x] input high

2C(2)

tw(GPIL)

Pulse duration, GP[x] input low

2C(2)

(1)

The pulse width given is sufficient to generate a CPU interrupt or an EDMA event. However, if a user wants to have C6421 recognize

the GP[x] input changes through software polling of the GPIO register, the GP[x] input duration must be extended to allow C6421

enough time to access the GPIO register through the internal bus.

(2)

C = SYSCLK3 period in ns. For example, when running parts at 600 MHz, use C = 10ns.

Table 6-84. Switching Characteristics Over Recommended Operating Conditions for GPIO Outputs

(see Figure 6-49)

-400

-500

NO.

PARAMETER

UNIT

-600

MIN

MAX

tw(GPOH)

Pulse duration, GP[x] output high

2C(1)(2)

tw(GPOL)

Pulse duration, GP[x] output low

2C(1)(2)

(1)

This parameter value should not be used as a maximum performance specification. Actual performance of back-to-back accesses of the

GPIO is dependent upon internal bus activity.

(2)

C = SYSCLK3 period in ns. For example, when running parts at 600 MHz, use C = 10ns.

Figure 6-49. GPIO Port Timing

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