2.4 R3 REGISTER

REGISTER

23

22

21

20

19

18

17

16

15

14

13

12

11

10

987654

3210

DATA[19:0]

C3

C2

C1

C0

R3

ACCESS[3:0]

RF_CPG[3:0]

IF_R[11:0]

0111

2.4.1 IF_R[11:0] -- IF R Divider Value

For the IF R divider, the R value is determined by the IF_R[11:0] bits in the R3 register. The minimum value for IF_R is 3.

R Value

IF_R[11:0]

3

000000000011

...

............

4095

111111111111

2.4.2 RF_CPG -- RF PLL Charge Pump Gain

This is used to control the magnitude of the RF PLL charge pump in steady state operation.

RF_CPG

Charge Pump State

Typical RF Charge Pump Current at 3 Volts (µA)

01X

95

1

2X

190

2

3X

285

3

4X

380

4

5X

475

5

6X

570

6

7X

665

7

8X

760

8

9X

855

9

10X

950

10

11X

1045

11

12X

1140

12

13X

1235

13

14X

1330

14

15X

1425

15

16X

1520

2.4.3 ACCESS -- Register Access word

It is mandatory that the first 5 registers R0-R4 be programmed. The programming of registers R5-R7 is optional. The

ACCESS[3:0] bits determine which additional registers need to be programmed. Any one of these registers can be individually

programmed. According to the table below, when the state of a register is in default mode, all the bits in that register are forced

to a default state and it is not necessary to program this register. When the register is programmable, it needs to be programmed

through the MICROWIRE. Using this register access technique, the programming required is reduced up to 37%.

ACCESS Bit

Register Location

Register Controlled

ACCESS[0]

R3[20]

Must be set to 1

ACCESS[1]

R3[21]

R5

ACCESS[2]

R3[22]

R6

ACCESS[3]

R3[23]

R7

The default conditions the registers is shown below:

Register

23

22

21

20

19

18

17

16

15

14

13

12

11

10

987654

3210

Data[19:0]

C3

C2

C1

C0

R4

R4 Must be programmed manually.

R5

000000000000

0

0

000000

1011

R6

000000000000

0

0

000000

1101

R7

000000000000

1

0

010000

1111

www.national.com

29