PCD3316 datasheet(14/30 Pages) PHILIPS

14 / 30 page

Philips Semiconductors

PCD3316

CIDCW receiver

Product speciﬁcation

11 March 1999

14 of 30

9397 750 04824

7.12.6

I2C-bus bit rate

When a microcontroller is used that implements an I2C-bus in software, the bit rate of

the I2C-bus can be critical during reception of FSK. The collection of the interrupt

data and FSK-data from the PCD3316 takes 48 bits on the I2C-bus. With an FSK

baud rate of 1200 (corresponds to 1200 bits per second) the minimal speed of the

I2C-bus should be 5.76 kbits/s. Additional interrupts generated by the time base of the

PCD3316 will cause the processor to collect extra information from the PCD3316.

As a consequence, the FSK-data can be overrun in the PCD3316 and one data byte

will be lost. In this case, the time base interrupt should be suppressed while FSK is

active. This can be done by setting the ‘INT-SUP on/off’ bit (bit 4 in Mode register 2).

The ‘TB on/off’ bit (bit 6 in Mode register 2) will still be set but the IRQ output will not

be activated by the time base interrupt. Any time base interrupt can be detected by

the microcontroller when an FSK interrupt is processed by reading the Interrupt

PCD3316 Datasheet(PDF) 14 Page - NXP Semiconductors