Philips Semiconductors

PCD3316

CIDCW receiver

Product specification

11 March 1999

15 of 30

9397 750 04824

© Philips Electronics N.V. 1999. All rights reserved.

7.13 Registers

7.13.1

Interrupt register (CIDINT)

Table 4:

Register overview

Address

Name

Function

Read/Write

Default value

00H

CIDINT

Interrupt register

read only

0000 0000

01H

CIDFSK

FSK data register

read only

−

02H

CIDSTA

Status register

read only

−

03H

CIDRNG

Ringer period register

read only

−

04H

CIDMD1

Mode register 1

read/write

0101 1000

05H

CIDMD2

Mode register 2

read/write

1101 0000

Table 5:

Interrupt register

Address: 00H; read only.

7

6

5

4

3

2

1

0

MIN Interrupt

SEC Interrupt

FSK Interrupt

Low Level Status

POL1 Interrupt

POL0 Interrupt

CAS Interrupt

−

Table 6:

Description of CIDINT bits

Bit

Symbol

Description

CIDINT.7 MIN Interrupt

MIN Interrupt = 0: no interrupt request;

MIN Interrupt = 1: one minute interrupt request

CIDINT.6 SEC Interrupt

SEC Interrupt = 0: no interrupt request;

SEC Interrupt = 1: one second interrupt request

CIDINT.5 FSK Interrupt

FSK Interrupt = 0: no FSK interrupt or FSK disabled;

FSK Interrupt = 1: FSK interrupt, one byte received

CIDINT.4 Low Level Status Low Level Status = 0: signal level on selected input above power reference (no interrupt);

Low Level Status = 1: signal level on selected input below power reference (no interrupt)

CIDINT.3 POL1 Interrupt

POL1 Interrupt = 0: no zero to one changes on POL1 input or polarity interrupt disabled;

POL1 Interrupt = 1: a one to zero input change on the POL1 input is detected

CIDINT.2 POL0 Interrupt

POL0 Interrupt = 0: no one to zero changes on POL0 input or polarity interrupt disabled;

POL0 Interrupt = 1: a zero to one input change on the POL0 input is detected

CIDINT.1 CAS Interrupt

CAS Interrupt = 0: no CAS signal detected or CAS disabled;

CAS Interrupt = 1: CAS signal detected

CIDINT.0

−

reserved bit