MXT641T datasheet(22/74 Pages) ATMEL

22 / 74 page

mXT641T 1.0 [Datasheet]

9917JX–AT42–02/15

Power-up / Reset Requirements

There is an internal Power-on Reset (POR) in the device.

If an external reset is to be used the device must be held in RESET (active low) while the digital (Vdd) analog (AVdd) and

I/O (VddIO) power supplies are powering up. The supplies must have reached their nominal values before the RESET

signal is deasserted (that is, goes high). This is shown in Figure 7-1. See Section 15.2 on page 52 for nominal values for

Vdd, VddIO, and AVdd.

Figure 7-1. Power Sequencing on the mXT641T

After power-up, the device takes 79 ms before it is ready to start communications.

If the RESET line is released before the AVdd supply has reached its nominal voltage (see Figure 7-2 on page 23), then

some additional operations need to be carried out by the host. There are two options open to the host controller:



Start the part in deep sleep mode and then send the command sequence to set the cycle time to wake the part and

allow it to run normally. Note that in this case a calibration command is also needed.



Send a reset command.

Note: When using external

at power-up,

RESET

VddIO must not be enabled after Vdd

RESET

(VddIO)

VddIO

AVdd

> 90 ns

Vdd

MXT641T Datasheet(PDF) 22 Page - ATMEL Corporation