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MAX3580 Datasheet(PDF) 13 Page - Maxim Integrated Products |
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MAX3580 Datasheet(HTML) 13 Page - Maxim Integrated Products |
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13 / 21 page ![]() Direct-Conversion TV Tuner ______________________________________________________________________________________ 13 Register Descriptions N-Divider Integer (Register Address 0x00) N<7:0>: VCO Integer-N Divider Ratio N-Divider Frac2 (Register Address 0x01) MP: Minimum CP Pulse Width. Always set to 0 (factory use only). LI1, LI0; CP Linearity Control. Always set to 00 (factory use only). INT: Integer Mode ON/OFF. Set to 0 for normal operation. F<19:16>: MSB of Main Divider Fractional Divide Ratio N-Divider Frac1, Frac0 (Register Address 0x02, 0x03) F<15:0> 16 LSB of Main Divider Fractional Divide Ratio Tracking Filter Series Capacitor (Register Address 0x04) TFS<7:4>: Tracking Filter Parallel Capacitor. TFS<3:0>: Tracking Filter Series Capacitor. See the RF tracking filter description in the Applications Information section. Tracking Filter Parallel Capacitor and VCO Control (Register Address 0x05) VCO_DIV1, VCO_DIV0: VCO Post Divider 00 = Divide by 4 use for RF frequencies of 540 to 868 MHz 01 = Divide by 8 use for RF frequencies of 470 to 550 MHz 10 = Divide by 16 use for RF frequencies of 170 to 230 MHz 11 = Divide by 32 is not used RFS: RF Input Select 0 = RFIN2 selected 1 = RFIN selected TF_BS: Tracking Filter Band Select 1 = VHF band 0 = UHF band TFP<4:0>: Tracking Filter Shunt Capacitor See the RF tracking filter description in the Applications Information section. PLL Configuration (Register Address 0x06) LF_DIV2, LF_DIV1, LF_DIV0: Prescaler for Internal Low Frequency Clocks 000 - 110 = Divided by 8 to 14 for REF crystal fre- quencies of 15MHz to 28MHz 111 = Divide by 2 for REF crystal frequencies of 4MHz ADLY1, ADLY0: VCO Autotuner Delay Selection CPS: Charge-Pump Current Mode 0 = Controlled by ICP bit 1 = Controlled by VCO autotuner ICP: Charge-Pump Current 0 = 600µA 1 = 1200µA RDIV: PLL Reference Divider Ratio 0 = Divide by 1 1 = Divide by 2 Test Functions (Register Address 0x07) CP_TST<2:0>: Charge-Pump Test Modes 000 = Normal operation 100 = Low impedance* 101 = Source 110 = Sink 111 = High impedance LD_MUX: Lock-Detector Mode 000 = Normal operation: high = PLL locked, low = unlocked 001 = Monitor N-divider output, post-divided by 2 010 = Monitor R-divider output* 011 = Modulator test vector output (factory use only) 1XX = Bias current trim (factory use only) * Not production tested. |
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