REV. 0

AD9948

–5–

PIN FUNCTION DESCRIPTIONS

Pin No.

Mnemonic

Type

*

Description

2–4

D0–D2

DO

Data Outputs (D0 is LSB)

5

DRVSS

P

Digital Driver Ground

6

DRVDD

P

Digital Driver Supply

7–13

D3–D9

DO

Data Outputs (D9 is MSB)

14

H1

DO

CCD Horizontal Clock 1

15

H2

DO

CCD Horizontal Clock 2

16

HVSS

P

H1–H4 Driver Ground

17

HVDD

P

H1–H4 Driver Supply

18

H3

DO

CCD Horizontal Clock 3

19

H4

DO

CCD Horizontal Clock 4

20

RGVSS

P

RG Driver Ground

21

RG

DO

CCD Reset Gate Clock

22

RGVDD

P

RG Driver Supply

23

TCVSS

P

Analog Ground for Timing Core

24

TCVDD

P

Analog Supply for Timing Core

25

CLI

DI

Master Clock Input

26

AVDD

P

Analog Supply for AFE

27

CCDIN

AI

Analog Input for CCD Signal (Connect through Series 0.1

µF Capacitor)

28

AVSS

P

Analog Ground for AFE

29

REFT

AO

Reference Top Decoupling (Decouple with 1.0

µF to AVSS)

30

REFB

AO

Reference Bottom Decoupling (Decouple with 1.0

µF to AVSS)

31

SL

DI

3-Wire Serial Load

32

SDI

DI

3-Wire Serial Data Input

33

SCK

DI

3-Wire Serial Clock

34

VD

DI

Vertical Sync Pulse

35

HD

DI

Horizontal Sync Pulse

36

DVSS

P

Digital Ground

37

DVDD

P

Digital Supply

38

HBLK

DI

Optional HBLK Input

39

CLP/PBLK

DO

CLPOB or PBLK Output

1, 40

NC

Not Internally Connected

*Type: AI = Analog Input, AO = Analog Output, DI = Digital Input, DO = Digital Output, P = Power.

PIN CONFIGURATION

TOP VIEW

AD9948

PIN 1

IDENTIFIER

30

REFB

29

REFT

28

AVSS

27

CCDIN

26

AVDD

25

CLI

24

TCVDD

23

TCVSS

22

RGVDD

21

RG

NC

1

(LSB) D0

2

D1

3

D2

4

DRVSS

5

DRVDD

6

D3

7

D4

8

D5

9

D6 10