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SWITCHING CHARACTERISTICS

(1)

TMDS351

SLLS840 – MAY 2007

ELECTRICAL CHARACTERISTICS (continued)

over recommended operating conditions (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

Switch resistance

27

40

Ω

Switch output voltage

1.9

3.6

V

STATUS AND SOURCE SELECTOR PINS

High-level digital input current

-10

10

µA

Low-level digital input current

-10

10

µA

TTL High-level output voltage

2.4

V

TTL Low-level output voltage

GND

0.4

V

over recommended operating conditions (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

TMDS DIFFERENTIAL PINS (Y/Z)

Propagation delay time, low-to-high-level output

400

650

900

ps

Propagation delay time, high-to-low-level output

400

650

900

ps

Differential output signal rise time (20% - 80%)

60

80

140

ps

Differential output signal fall time (20% - 80%)

60

80

140

ps

6

20

ps

Intra-pair differential skew, see Figure 4

20

40

ps

30

65

ps

Part-to-part skew

510

ps

Peak-to-peak output jitter from Yj/Zj(1) residual jitter

See Figure 5,

8

20

ps

Am/Bm(1) = 250 MHz clock,

Peak-to-peak output jitter from Yj/Zj(2:4) residual jitter

60

80

ps

Am/Bm(2:4) = 2.5 Gbps HDMI pattern

Select to switch output

50

70

ns

See Figure 6,

Enable time

170

250

ns

10-mA Current source to the input

Disable time

9

15

ns

Propagation delay from SCLn to SCL_SINK or SDAn to

8

15

ns

SDA_SINK or SDA_SINK to SDAn

Switch time from SCLn to SCL_SINK

8

15

ns

Propagation delay (from HPD_SINK to the active port of HPD)

14

20

ns

Switch time from port select to the latest valid status of HPD

33

50

ns

(1)

analyzer.

(2)

All typical values are at 25

°C and with a 3.3-V supply.

(3)

(4)

the active source port are tied together.

(5)

operate with the same source, the same supply voltages, at the same temperature, and have identical packages and test circuits.

9

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