AM625 datasheet(7/260 Pages) TI1

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4 Revision History

Changes from November 12, 2022 to June 15, 2023 (from Revision A (NOVEMBER 2022) to

Revision B (JUNE 2023))

Page

• Global: Changed the document product status from "Production Mixed Status" to "Production Data", where

both the ALW and AMC packaged devices are fully-qualified with Production Data..........................................1

• Global: Added automotive AEC - Q100 device-specific information for the AM625-Q1 and AM620-Q1

devices supported in the 17.2 mm × 17.2 mm AMC package............................................................................1

• (Features): Changed the CSI data rate from 2.5Gbps to 1.5Gbps to match the rate defined in the CSI-2 timing

section................................................................................................................................................................ 1

• (Features): Updated the Security features to clarify what is supported..............................................................1

• (Features): Included Multi-Media Card (MMC) in the first bullet describing MMC/SD features .........................1

• (Description): Added AM625-Q1 and AM620-Q1 and updated the descriptions for each device...................... 4

• (Package Information): Updated the table to match the new content standard and added automotive "-Q1"

devices................................................................................................................................................................4

• (Functional Block Diagram): Added the Software Build Sheet note................................................................... 5

• (Device Comparison): Added AM625-Q1 to the AM625 columns and added new columns for the AM620-Q1

devices................................................................................................................................................................9

• (Device Comparison): Corrected the name of the JTAG User ID register.......................................................... 9

• (Pin Connectivity Requirements): Updated the second note to include the meaning of "no connect"..............84

• (Pin Connectivity Requirements): Updated the second paragraph of the note following the Connectivity

Requirements table. The update clarifies the operation of configurable device IOs and includes precautions

that must be taken to prevent floating signals from damaging device input buffers......................................... 84

• (ESD Ratings for Devices which are not AEC - Q100 Qualified): Changed the title to clarify the ESD ratings

defined in this table apply to devices which are not AEC - Q100 qualified.......................................................90

• (ESD Ratings for AEC - Q100 Qualified Devices in the AMC Package): Changed the title to clarify the ESD

ratings defined in this table only apply to AEC - Q100 qualified devices in the AMC package........................ 90

• (Recommended Operating Conditions): Created separate table notes for VDD_CANUART and

VDDSHV_CANUART........................................................................................................................................91

• (Operating Performance Points): Changed the Maximum Operating Frequency of the Device/Power Manager

(Cortex-R5F) for speed grades "S" and "T" from 800 to 400............................................................................93

• (DDR Electrical Characteristics): Added references to the respective JEDEC standards................................98

• (Power-Up Sequencing): Added Power-Up Sequencing – Supply / Signal Assignments table with waveform

references and notes. Added a new waveform for VDD_CANUART to show its sequence requirements

relative to VDD_CORE when powered from a separate always on power source.........................................104

• (Power-Down Sequencing): Added Power-Down Sequencing – Supply / Signal Assignments table with

waveform references and notes. Added a new waveform for VDD_CANUART to show its sequence

requirements relative to VDD_CORE when powered from a separate always on power source...................107

• (MCU_RESETSTATz, and RESETSTATz Switching Characteristics): Changed the minimum value of

parameter RST13 from "0" to "960"................................................................................................................ 110

• (LFXOSC Modes of Operation): Changed the value of PD_C for BYPASS mode from "X" to "0"................. 123

• (DSS Switching Characteristics): Added external pixel clock mode "EXTPCLKIN" to parameters D2, D3, D4,

and D5. Also changed the "Internal PLL" mode min value for parameters D2 and D3 from "0.0475P" to

"0.0475P - 0.3"............................................................................................................................................... 137

• (MCASP): Updated each AHCLKR/X table note to include a TRM reference for clock source options. Also

corrected a typographical error on the signal name associated with the first waveform in each timing diagram

by changing "MCASP[x]_ACLKR/X" to "MCASP[x]_AHCLKR/X"...................................................................169

• (MMC0 DLL Delay Mapping): Changed the OTAPDLYENA and OTAPDLYSEL values for Legacy SDR and

High Speed SDR modes................................................................................................................................ 179

• (MMC1/MMC2 DLL Delay Mapping for all Timing Modes): Changed the "UHS-I DR50" mode name to "UHS-I

DDR50" to correct a typographical error.........................................................................................................191

• (OSPI Switching Characteristics – PHY Data Training): Added maximum values to the OSPI0_CLK Cycle

Time parameter (O1) to define a minimum operating frequency of 133MHz. Also updated Note 1 and Note 4,

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AM625, AM625-Q1, AM623, AM620-Q1

SPRSP58B – JUNE 2022 – REVISED JUNE 2023

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Product Folder Links: AM625 AM625-Q1 AM623 AM620-Q1

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